[U-Boot] [U-Boot, 1/4] cam_enc_4xx: fix CONFIG_SPL_MAX_SIZE semantics

[Heiko Schocher <hs@denx.de>]

Hello Tom,

Am 08.04.2013 22:43, schrieb Tom Rini:
> On Mon, Apr 08, 2013 at 09:58:26AM -0000, Albert ARIBAUD wrote:
> 
>> CONFIG_SPL_MAX_SIZE wrongly included BSS size. Split
>> max size between image and BSS based on sizes reported
>> for current build.
>>
>> Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
>>
>> ---
>> board/ait/cam_enc_4xx/u-boot-spl.lds |    2 +-
>>  include/configs/cam_enc_4xx.h        |    4 +++-
>>  2 files changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/board/ait/cam_enc_4xx/u-boot-spl.lds b/board/ait/cam_enc_4xx/u-boot-spl.lds
>> index dd9d52d..25625dc 100644
>> --- a/board/ait/cam_enc_4xx/u-boot-spl.lds
>> +++ b/board/ait/cam_enc_4xx/u-boot-spl.lds
>> @@ -25,7 +25,7 @@
>>   */
>>  
>>  MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
>> -		LENGTH = CONFIG_SPL_MAX_SIZE }
>> +		LENGTH = (CONFIG_SPL_MAX_SIZE + CONFIG_SPL_BSS_MAX_SIZE) }
>>  
>>  OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
>>  OUTPUT_ARCH(arm)
>> diff --git a/include/configs/cam_enc_4xx.h b/include/configs/cam_enc_4xx.h
>> index 56528dd..df3682b 100644
>> --- a/include/configs/cam_enc_4xx.h
>> +++ b/include/configs/cam_enc_4xx.h
>> @@ -230,7 +230,9 @@
>>  #define CONFIG_SPL_STACK		(0x00010000 + 0x7f00)
>>  
>>  #define CONFIG_SPL_TEXT_BASE		0x00000020 /*CONFIG_SYS_SRAM_START*/
>> -#define CONFIG_SPL_MAX_SIZE		12320
>> +/* SPL max size is 12K -- but --pad-to requires a single decimal number */
>> +#define CONFIG_SPL_MAX_SIZE		12288
>> +#define CONFIG_SPL_BSS_MAX_SIZE		(4*1024)
> 
> This is wrong, you've just increased the overall limit to 16K.  I know
> there's a reason that current limit is so exact, Heiko?  And also, this

The cam_enc_4xx use only 12k for the SPL code. This is defined in the
UBL header, see u-boot:doc/README.davinci.nand_spl, but can be adapted
for this board. The SoC has an IRam of 32K - ~2k for RBL stack, see:

http://www.ti.com/lit/gpn/tms320dm368

I have no access anymore to this HW to do some tests :-( so I looked
into the hexdump of the current u-boot code with your patch applied, and
the code on the interesting borders (0x0, 0x800 and 0x3800) looks good
to me ...

> shows the conceptual problem I have (and 2/2 has the same, along with
> tegra).  The important limit is the combined size.  It doesn't matter if
> it's 11K text/data/rodata and 1K BSS, or 8+4.  When using custom linker
> scripts, we avoid this and can just comment overall (which would need
> adding here) that we only care about the combined size.  But then tegra
> would be wrong since it uses the generic arm spl linker script?

bye,
Heiko
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