From: Suravee Suthikulanit <suravee.suthikulpanit@amd.com>
To: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: jun.nakajima@intel.com, haitao.shan@intel.com,
jacob.shin@amd.com, dietmar.hahn@ts.fujitsu.com,
xen-devel@lists.xen.org, JBeulich@suse.com
Subject: Re: [PATCH v2 0/9] Various VPMU patches, version 2
Date: Mon, 15 Apr 2013 13:04:02 -0500 [thread overview]
Message-ID: <516C4112.3000204@amd.com> (raw)
In-Reply-To: <1365789566-3733-1-git-send-email-boris.ostrovsky@oracle.com>
Overall looks good. Tested.
Thanks,
Suravee
On 4/12/2013 12:59 PM, Boris Ostrovsky wrote:
> Version 2 of VPMU patches.
>
> Changes:
> * Load context on MSR read on SVM and then read MSR from HW (Suravee's suggestion)
> * Group VPMU state bits separate from feature bits (Dietmar's suggestion)
> * Clean up (int->unsigned int for loop control, trailing spaces)
> * Rename VPMU_STOPPED to VPMU_FROZEN (*slightly* more sensible since it is
> possible to be both STOPPED and RUNNING)
> * Add patch for dumping VPMU state on AMD
> * Add Reviewed-by/Tested-by/Acked-by tags that have been posted for v1
>
> -boris
>
>
> Boris Ostrovsky (9):
> x86/AMD: Allow more fine-grained control of VMCB MSR Permission Map
> x86/AMD: Do not intercept access to performance counters MSRs
> x86/AMD: Load context when attempting to read VPMU MSRs
> x86/AMD: Stop counters on VPMU save
> x86/VPMU: Add Haswell support
> x86/VPMU: Factor out VPMU common code
> x86/VPMU: Save/restore VPMU only when necessary
> x86/AMD: Clean up context_update() in AMD VPMU code
> x86/AMD: Dump AMD VPMU info
>
> xen/arch/x86/domain.c | 14 ++-
> xen/arch/x86/hvm/svm/svm.c | 19 ++-
> xen/arch/x86/hvm/svm/vpmu.c | 197 +++++++++++++++++++++++--------
> xen/arch/x86/hvm/vmx/vmx.c | 2 -
> xen/arch/x86/hvm/vmx/vpmu_core2.c | 48 ++++----
> xen/arch/x86/hvm/vpmu.c | 114 ++++++++++++++++--
> xen/include/asm-x86/hvm/svm/vmcb.h | 8 +-
> xen/include/asm-x86/hvm/vmx/vpmu_core2.h | 1 -
> xen/include/asm-x86/hvm/vpmu.h | 15 ++-
> 9 files changed, 312 insertions(+), 106 deletions(-)
>
prev parent reply other threads:[~2013-04-15 18:04 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-12 17:59 [PATCH v2 0/9] Various VPMU patches, version 2 Boris Ostrovsky
2013-04-12 17:59 ` [PATCH v2 1/9] x86/AMD: Allow more fine-grained control of VMCB MSR Permission Map Boris Ostrovsky
2013-04-12 17:59 ` [PATCH v2 2/9] x86/AMD: Do not intercept access to performance counters MSRs Boris Ostrovsky
2013-04-12 17:59 ` [PATCH v2 3/9] x86/AMD: Load context when attempting to read VPMU MSRs Boris Ostrovsky
2013-04-12 17:59 ` [PATCH v2 4/9] x86/AMD: Stop counters on VPMU save Boris Ostrovsky
2013-04-12 17:59 ` [PATCH v2 5/9] x86/VPMU: Add Haswell support Boris Ostrovsky
2013-04-12 17:59 ` [PATCH v2 6/9] x86/VPMU: Factor out VPMU common code Boris Ostrovsky
2013-04-12 17:59 ` [PATCH v2 7/9] x86/VPMU: Save/restore VPMU only when necessary Boris Ostrovsky
2013-04-12 17:59 ` [PATCH v2 8/9] x86/AMD: Clean up context_update() in AMD VPMU code Boris Ostrovsky
2013-04-15 18:00 ` Suravee Suthikulanit
2013-04-12 17:59 ` [PATCH v2 9/9] x86/AMD: Dump AMD VPMU info Boris Ostrovsky
2013-04-15 17:54 ` Suravee Suthikulanit
2013-04-15 18:04 ` Suravee Suthikulanit [this message]
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