From mboxrd@z Thu Jan  1 00:00:00 1970
From: Kenneth Graunke <kenneth@whitecape.org>
Subject: Re: [PATCH] intel: Add pci id for Haswell Harris Beach
 Mobile GT2+
Date: Tue, 16 Apr 2013 09:29:18 -0700
Message-ID: <516D7C5E.7000800@whitecape.org>
References: <1366073530-12098-1-git-send-email-chad.versace@linux.intel.com>
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To: Chad Versace <chad.versace@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
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On 04/15/2013 05:52 PM, Chad Versace wrote:
> Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
> ---
>   intel/intel_chipset.h | 4 +++-
>   1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
> index b73fa0f..da2fbee 100644
> --- a/intel/intel_chipset.h
> +++ b/intel/intel_chipset.h
> @@ -82,6 +82,7 @@
>   #define PCI_CHIP_HASWELL_CRW_S_GT1      0x0D1A /* Server */
>   #define PCI_CHIP_HASWELL_CRW_S_GT2      0x0D2A
>   #define PCI_CHIP_HASWELL_CRW_S_GT2_PLUS 0x0D3A
> +#define PCI_CHIP_HASWELL_HSB_M_GT2_PLUS 0x0A26 /* Mobile */
>
>   #define IS_830(dev) (dev == 0x3577)
>   #define IS_845(dev) (dev == 0x2562)
> @@ -198,7 +199,8 @@
>   				 devid == PCI_CHIP_HASWELL_ULT_S_GT2_PLUS || \
>   				 devid == PCI_CHIP_HASWELL_CRW_GT2_PLUS || \
>   				 devid == PCI_CHIP_HASWELL_CRW_M_GT2_PLUS || \
> -				 devid == PCI_CHIP_HASWELL_CRW_S_GT2_PLUS)
> +				 devid == PCI_CHIP_HASWELL_CRW_S_GT2_PLUS || \
> +				 devid == PCI_CHIP_HASWELL_HSB_M_GT2_PLUS)
>
>   #define IS_HASWELL(devid)       (IS_HSW_GT1(devid) || \
>                                    IS_HSW_GT2(devid))
>


What project is this patch for?  libdrm?

Regardless, NAK - see above line:

#define PCI_CHIP_HASWELL_ULT_M_GT2_PLUS 0x0A26

It's already been supported for ages:

commit 93fef04b1e3a83e2f884880ed1c3395f67b038ab
Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
Date:   Mon Aug 6 14:55:23 2012 -0300

     intel: add more Haswell PCI IDs

     Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
     Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>

--Ken