Re: [Qemu-devel] [RFC/PATCH 0/1] cpu hotplug for s390

[Christian Borntraeger <borntraeger@de.ibm.com>]

On 19/04/13 15:16, Andreas Färber wrote:
[...]
>>> Background is that for x86 we currently have a flat CPU core/thread
>>> namespace but would need to deal with sockets, cores and threads to get
>>> topologies right. I assume there are no such issues on s390x, so that
>>> the vCPU to CPUState mapping could stay 1:1?
>>
>> s390 hardware today already has a topology and CPU features.  We are not 
>> modelling it in QEMU right now, but want to go there in the future so that 
>> there would be no simple 1:1 mapping anymore.
> 
> In that case please enlighten us how the topology model should/could
> look like in the future, so that we can align this with the x86
> remodelling and APIC/ID discussion.

Current models provide topology information via the STSI instruction
(http://publibfi.boulder.ibm.com/epubs/pdf/dz9zr009.pdf
see page 10-134 and following) function code 15. The system basically informs about
cpus and containers, which boils down to how the hardware is organized:

e.g. fr zec12 we have up to 4 Nodes(aka books). A book contains one MCM
with 6 processors. Each processor then has 6 cores.
(see http://publibfi.boulder.ibm.com/epubs/pdf/dz9zr009.pdf)

Future systems might look different, I dont know if and how the topology will
change. Currently there is no information about memory locality, only processor
grouping.

As Jens said, as of now we do not provide any topology information to the
guest, but we might to change that in the future.

I havent followed the x86 discussion, so please let me know if that
doesnt answer your question.


Christian