From mboxrd@z Thu Jan  1 00:00:00 1970
From: Anthony PERARD <anthony.perard@citrix.com>
Subject: Re: [RFC 26/29] xen/arm: Add Exynos 4210 UART support
	for early printk
Date: Wed, 1 May 2013 18:24:55 +0100
Message-ID: <51814FE7.9020406@citrix.com>
References: <cover.1367188423.git.julien.grall@linaro.org>
	<f65f6ebaedf65e31a811e079a417001f50ae9d89.1367188423.git.julien.grall@linaro.org>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
Return-path: <xen-devel-bounces@lists.xen.org>
In-Reply-To: <f65f6ebaedf65e31a811e079a417001f50ae9d89.1367188423.git.julien.grall@linaro.org>
List-Unsubscribe: <http://lists.xen.org/cgi-bin/mailman/options/xen-devel>,
	<mailto:xen-devel-request@lists.xen.org?subject=unsubscribe>
List-Post: <mailto:xen-devel@lists.xen.org>
List-Help: <mailto:xen-devel-request@lists.xen.org?subject=help>
List-Subscribe: <http://lists.xen.org/cgi-bin/mailman/listinfo/xen-devel>,
	<mailto:xen-devel-request@lists.xen.org?subject=subscribe>
Sender: xen-devel-bounces@lists.xen.org
Errors-To: xen-devel-bounces@lists.xen.org
To: Julien Grall <julien.grall@linaro.org>
Cc: "patches@linaro.org" <patches@linaro.org>, Ian Campbell <Ian.Campbell@citrix.com>, Stefano Stabellini <Stefano.Stabellini@eu.citrix.com>, "xen-devel@lists.xen.org" <xen-devel@lists.xen.org>
List-Id: xen-devel@lists.xenproject.org

On 29/04/13 00:02, Julien Grall wrote:
> diff --git a/xen/arch/arm/arm32/debug-exynos5.S b/xen/arch/arm/arm32/debug-exynos5.S
> new file mode 100644
> index 0000000..cbe1705
> --- /dev/null
> +++ b/xen/arch/arm/arm32/debug-exynos5.S
> @@ -0,0 +1,81 @@
> +/*
> + * xen/arch/arm/arm32/debug-exynos5.S
> + *
> + * Exynos 5 specific debug code
> + *
> + * Copyright (c) 2013 Citrix Systems.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <asm/asm_defns.h>
> +
> +#define EXYNOS5_UART_BASE_ADDRESS 0x12c20000
> +
> +.globl early_uart_paddr
> +early_uart_paddr: .word EXYNOS5_UART_BASE_ADDRESS
> +
> +/* Exynos 5 UART initialization
> + * r11: UART base address
> + * Clobber r0-r1 */
> +.globl early_uart_init
> +early_uart_init:
> +        /* init clock */
> +        ldr   r1, =0x10020000
> +        /* select MPLL (800MHz) source clock */
> +        ldr   r0, [r1, #0x250]
> +        and   r0, r0, #(~(0xf<<8))
> +        orr   r0, r0, #(0x6<<8)
> +        str   r0, [r1, #0x250]
> +        /* ration 800/(7+1) */
> +        ldr   r0, [r1, #0x558]
> +        and   r0, r0, #(~(0xf<<8))
> +        orr   r0, r0, #(0x7<<8)
> +        str   r0, [r1, #0x558]
> +
> +        mov   r1, #4
> +        str   r1, [r11, #0x2c]          /* -> UARTIBRD (Baud divisor fraction) */

Could you replace UARTIBRD by UFRACVAL? The former is the name for the
PL011, and the latter is the name given by the Exynos 5 manual.

> +        mov   r1, #53
> +        str   r1, [r11, #0x28]          /* -> UARTIBRD (Baud divisor integer) */

Same here with UBRDIV.

-- 
Anthony PERARD