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diff for duplicates of <5183819E.50308@arm.com>

diff --git a/a/1.txt b/N1/1.txt
index c5a3b08..ccee347 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,4 +1,4 @@
-Hi André,
+Hi Andr?,
 
 Will pointed me at this thread and I had a look at fixing
 this up yesterday by extending his original patch...
@@ -10,11 +10,11 @@ that will result in incorrect behaviour, I think.
 I've commented below inline and there's a patch at the bottom- can
 you let me know if it works for you?
 
-On 02/05/13 20:54, André Hentschel wrote:
+On 02/05/13 20:54, Andr? Hentschel wrote:
 > Am 24.04.2013 11:42, schrieb Will Deacon:
 >> Hi Andrew,
 >>
->> On Tue, Apr 23, 2013 at 11:42:22PM +0100, André Hentschel wrote:
+>> On Tue, Apr 23, 2013 at 11:42:22PM +0100, Andr? Hentschel wrote:
 >>> Am 23.04.2013 11:15, schrieb Will Deacon:
 >>>> You could introduce `get' tls functions, which don't do anything for CPUs
 >>>> without the relevant registers.
@@ -213,7 +213,7 @@ sent it yesterday but was getting things set up for testing on
 1136 (v6 not k)
 
 ----8<-------
-From bd3fe4055777b404a1635f366483637fd0cfa35a Mon Sep 17 00:00:00 2001
+>From bd3fe4055777b404a1635f366483637fd0cfa35a Mon Sep 17 00:00:00 2001
 From: Jonathan Austin <jonathan.austin@arm.com>
 Date: Fri, 8 Feb 2013 15:55:12 +0000
 Subject: [PATCH] ARM: tls: context switch user writeable TLS register
diff --git a/a/content_digest b/N1/content_digest
index c896795..6e7aecf 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -6,18 +6,13 @@
  "ref\051770E4E.2040003@dawncrow.de\0"
  "ref\020130424094251.GA21850@mudshark.cambridge.arm.com\0"
  "ref\05182C480.3080001@dawncrow.de\0"
- "From\0Jonathan Austin <jonathan.austin@arm.com>\0"
- "Subject\0Re: [PATCHv2] arm: Preserve TPIDRURW on context switch\0"
+ "From\0jonathan.austin@arm.com (Jonathan Austin)\0"
+ "Subject\0[PATCHv2] arm: Preserve TPIDRURW on context switch\0"
  "Date\0Fri, 03 May 2013 10:21:34 +0100\0"
- "To\0Andr\303\251 Hentschel <nerv@dawncrow.de>\0"
- "Cc\0Will Deacon <Will.Deacon@arm.com>"
-  linux-arch@vger.kernel.org <linux-arch@vger.kernel.org>
-  Russell King - ARM Linux <linux@arm.linux.org.uk>
-  linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>
- " linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
- "Hi Andr\303\251,\n"
+ "Hi Andr?,\n"
  "\n"
  "Will pointed me at this thread and I had a look at fixing\n"
  "this up yesterday by extending his original patch...\n"
@@ -29,11 +24,11 @@
  "I've commented below inline and there's a patch at the bottom- can\n"
  "you let me know if it works for you?\n"
  "\n"
- "On 02/05/13 20:54, Andr\303\251 Hentschel wrote:\n"
+ "On 02/05/13 20:54, Andr? Hentschel wrote:\n"
  "> Am 24.04.2013 11:42, schrieb Will Deacon:\n"
  ">> Hi Andrew,\n"
  ">>\n"
- ">> On Tue, Apr 23, 2013 at 11:42:22PM +0100, Andr\303\251 Hentschel wrote:\n"
+ ">> On Tue, Apr 23, 2013 at 11:42:22PM +0100, Andr? Hentschel wrote:\n"
  ">>> Am 23.04.2013 11:15, schrieb Will Deacon:\n"
  ">>>> You could introduce `get' tls functions, which don't do anything for CPUs\n"
  ">>>> without the relevant registers.\n"
@@ -232,7 +227,7 @@
  "1136 (v6 not k)\n"
  "\n"
  "----8<-------\n"
- "From bd3fe4055777b404a1635f366483637fd0cfa35a Mon Sep 17 00:00:00 2001\n"
+ ">From bd3fe4055777b404a1635f366483637fd0cfa35a Mon Sep 17 00:00:00 2001\n"
  "From: Jonathan Austin <jonathan.austin@arm.com>\n"
  "Date: Fri, 8 Feb 2013 15:55:12 +0000\n"
  "Subject: [PATCH] ARM: tls: context switch user writeable TLS register\n"
@@ -530,4 +525,4 @@
  "-- \n"
  1.7.9.5
 
-df42baea386f4344d3053d897291878fc18fbe2477c0a75519ad2c4b16cf56fa
+04cd8be4d7153996a0271d3f40eb61dce198c55f70bdd6e3a252a9b1b9590d55

diff --git a/a/1.txt b/N2/1.txt
index c5a3b08..f594644 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -213,7 +213,7 @@ sent it yesterday but was getting things set up for testing on
 1136 (v6 not k)
 
 ----8<-------
-From bd3fe4055777b404a1635f366483637fd0cfa35a Mon Sep 17 00:00:00 2001
+>From bd3fe4055777b404a1635f366483637fd0cfa35a Mon Sep 17 00:00:00 2001
 From: Jonathan Austin <jonathan.austin@arm.com>
 Date: Fri, 8 Feb 2013 15:55:12 +0000
 Subject: [PATCH] ARM: tls: context switch user writeable TLS register
diff --git a/a/content_digest b/N2/content_digest
index c896795..fb73988 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -232,7 +232,7 @@
  "1136 (v6 not k)\n"
  "\n"
  "----8<-------\n"
- "From bd3fe4055777b404a1635f366483637fd0cfa35a Mon Sep 17 00:00:00 2001\n"
+ ">From bd3fe4055777b404a1635f366483637fd0cfa35a Mon Sep 17 00:00:00 2001\n"
  "From: Jonathan Austin <jonathan.austin@arm.com>\n"
  "Date: Fri, 8 Feb 2013 15:55:12 +0000\n"
  "Subject: [PATCH] ARM: tls: context switch user writeable TLS register\n"
@@ -530,4 +530,4 @@
  "-- \n"
  1.7.9.5
 
-df42baea386f4344d3053d897291878fc18fbe2477c0a75519ad2c4b16cf56fa
+fbc5922bc58ad184385b25d66e8016117bee11dc6bb7d4d1eb1c7a8895c2d15a

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