From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:40950) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UYXun-00056o-4T for qemu-devel@nongnu.org; Sat, 04 May 2013 04:33:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UYXul-000860-Mp for qemu-devel@nongnu.org; Sat, 04 May 2013 04:33:57 -0400 Received: from cantor2.suse.de ([195.135.220.15]:33919 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UYXul-00084r-8E for qemu-devel@nongnu.org; Sat, 04 May 2013 04:33:55 -0400 Message-ID: <5184C7ED.1090309@suse.de> Date: Sat, 04 May 2013 10:33:49 +0200 From: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= MIME-Version: 1.0 References: <5184C1EE.7050305@web.de> In-Reply-To: <5184C1EE.7050305@web.de> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] Patch of consistent VMX cpu flag List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?B?IuadjuaYpeWlhyA8QXJ0aHVyIENodW5xaSBMaT4i?= Cc: Igor Mammedov , Jan Kiszka , qemu-devel@nongnu.org, Eduardo Habkost -----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Am 04.05.2013 10:08, schrieb Jan Kiszka: > On 2013-05-04 09:59, =E6=9D=8E=E6=98=A5=E5=A5=87 wro= te: >> Hi all, There's a patch for some simulated Intel CPU with default >> flag of VMX, now only core(2)duo are with VMX flag by default. >>=20 >> Add default ext_features of CPUID_EXT_VMX to the following CPUs:=20 >> kvm64, kvm32, Penryn, Nehalem, Westmere, SandyBridge, Haswell. >>=20 >> Other CPUs of AMD and lower versions of Intel CPU without VMX >> support don't add this feature by default. >>=20 >> Patch: >=20 > Please have a look at http://wiki.qemu.org/Contribute/SubmitAPatch=20 > regarding how to format a patch. >=20 > Moreover, your mail client had line-wrapping enabled which ruins > the patch. And you are sending mixed plain/html mails, but only > plain-text is acceptable. Further, you need to rebase your patch on yesterday's code. It is not acceptable to simply add CPUID flags to the fields, you need to assure that pc-i440fx-1.4 and earlier machines maintain the old values for migration compatibility. See Eduardo's and my pending series on the mailing list. Regards, Andreas >> diff --git a/target-i386/cpu.c b/target-i386/cpu.c index >> e2302d8..7b659f7 100644 --- a/target-i386/cpu.c +++ >> b/target-i386/cpu.c @@ -490,7 +490,7 @@ static x86_def_t >> builtin_x86_defs[] =3D { CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |=20 >> CPUID_PSE36, /* Missing: CPUID_EXT_POPCNT, CPUID_EXT_MONITOR */ - >> .ext_features =3D CPUID_EXT_SSE3 | CPUID_EXT_CX16, + >> .ext_features =3D CPUID_EXT_SSE3 | CPUID_EXT_CX16 | CPUID_EXT_VMX,=20 >> /* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */=20 >> .ext2_features =3D (PPRO_FEATURES & CPUID_EXT2_AMD_ALIASES) |=20 >> CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, @@ -522,7 >> +522,7 @@ static x86_def_t builtin_x86_defs[] =3D { .stepping =3D 1,=20 >> .features =3D PPRO_FEATURES | CPUID_MTRR | CPUID_CLFLUSH | >> CPUID_MCA | CPUID_PSE36, - .ext_features =3D >> CPUID_EXT_SSE3, + .ext_features =3D CPUID_EXT_SSE3 | >> CPUID_EXT_VMX, .ext2_features =3D PPRO_FEATURES & >> CPUID_EXT2_AMD_ALIASES, .ext3_features =3D 0, .xlevel =3D >> 0x80000008, @@ -648,7 +648,7 @@ static x86_def_t >> builtin_x86_defs[] =3D { CPUID_MCE | CPUID_PAE | CPUID_MSR | >> CPUID_TSC | CPUID_PSE | CPUID_DE | CPUID_FP87, .ext_features =3D >> CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | - >> CPUID_EXT_SSE3, + CPUID_EXT_SSE3 | CPUID_EXT_VMX,=20 >> .ext2_features =3D CPUID_EXT2_LM | CPUID_EXT2_NX |=20 >> CPUID_EXT2_SYSCALL, .ext3_features =3D CPUID_EXT3_LAHF_LM, .xlevel >> =3D 0x8000000A, @@ -667,7 +667,7 @@ static x86_def_t >> builtin_x86_defs[] =3D { CPUID_MCE | CPUID_PAE | CPUID_MSR | >> CPUID_TSC | CPUID_PSE | CPUID_DE | CPUID_FP87, .ext_features =3D >> CPUID_EXT_POPCNT | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 | - >> CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_SSE3, + >> CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_SSE3 |=20 >> CPUID_EXT_VMX, .ext2_features =3D CPUID_EXT2_LM | >> CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, .ext3_features =3D >> CPUID_EXT3_LAHF_LM, .xlevel =3D 0x8000000A, @@ -687,7 +687,7 @@ >> static x86_def_t builtin_x86_defs[] =3D { CPUID_DE | CPUID_FP87,=20 >> .ext_features =3D CPUID_EXT_AES | CPUID_EXT_POPCNT | >> CPUID_EXT_SSE42 | CPUID_EXT_SSE41 | CPUID_EXT_CX16 | >> CPUID_EXT_SSSE3 | - CPUID_EXT_PCLMULQDQ | >> CPUID_EXT_SSE3, + CPUID_EXT_PCLMULQDQ | >> CPUID_EXT_SSE3 | CPUID_EXT_VMX, .ext2_features =3D CPUID_EXT2_LM | >> CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, .ext3_features =3D >> CPUID_EXT3_LAHF_LM, .xlevel =3D 0x8000000A, @@ -709,7 +709,7 @@ >> static x86_def_t builtin_x86_defs[] =3D {=20 >> CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_POPCNT |=20 >> CPUID_EXT_X2APIC | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 |=20 >> CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_PCLMULQDQ | - >> CPUID_EXT_SSE3, + CPUID_EXT_SSE3 | CPUID_EXT_VMX,=20 >> .ext2_features =3D CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | >> CPUID_EXT2_NX | CPUID_EXT2_SYSCALL, .ext3_features =3D >> CPUID_EXT3_LAHF_LM, @@ -733,7 +733,7 @@ static x86_def_t >> builtin_x86_defs[] =3D { CPUID_EXT_SSE41 | CPUID_EXT_CX16 | >> CPUID_EXT_SSSE3 | CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |=20 >> CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |=20 >> - CPUID_EXT_PCID, + CPUID_EXT_PCID | >> CPUID_EXT_VMX, .ext2_features =3D CPUID_EXT2_LM | CPUID_EXT2_RDTSCP >> | CPUID_EXT2_NX | CPUID_EXT2_SYSCALL, .ext3_features =3D >> CPUID_EXT3_LAHF_LM, >>=20 >=20 >=20 - --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=C3=BCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=C3=B6rffer; HRB 16746 AG N=C3=BC= rnberg -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.19 (GNU/Linux) iQIcBAEBAgAGBQJRhMftAAoJEPou0S0+fgE/da0P/3B6NbUdfhpkKOP/hZES1xHz HAAULsF8MsXpJrVnrXOZxFq75NSry/O09HaPb++4Sl+qVxdPNdIj3A2SsgJHODJK jvYNRkrXmAvtJGUmGfzQ/nFVu72QZgxh9jx0VtTURLYvhSVZI0U8Cj9NybAUzPf8 H1JQCENdZSQb1TMqv6Hg9YV0Ws10EgGOaZsXNvdRcsvn7+YwtXu7OiCymanN7iVB 3jW04WHx6RGrN0q/1sOUWMlHkokA0yVvPQC0/H1E8aBcmdUKdpdM6Wp0nM5sWQd4 K+AGeZ051BAfiTR42lzdQVyW1LIOMK+L1mYjngmpWEBCaQbla3lz4ICgr+lR/tl7 7kFzVz4yAu7vGanwX2HnRlDasag16nsLtAps7xOfpbrBl7Yy2u1EK9k6KIABbc4p wuAWVk3Xwn1q6jjlPU0b95xoUeJwFCWs1PzKFFhS/zfILnLudV8OSqFBDszxhnqT vI09OTHD6oViKLFNY3LYrs7bMaf1C1LLbAdf/uXCVssR3+noXeXnKHr70spvKdjN qs80A6fVPxMzI4IgadPg0TQoIRPmLpZ9wIYjN3Ed22x2CJ0fpA+tQp6k69IYl55s Cs6UYknfK6X0/r75qq4yGXwByXxqfweQWaLg77JpjAIZczTNG0scEILb3Txo5vzQ RU7ElB2XoKjRlLxRs8ZC =3Dshc0 -----END PGP SIGNATURE-----