From mboxrd@z Thu Jan 1 00:00:00 1970 From: Suravee Suthikulanit Subject: Re: [PATCH] AMD IOMMU: fill msi_desc fields required by commit fe017c59 Date: Tue, 7 May 2013 08:47:23 -0500 Message-ID: <518905EB.9050801@amd.com> References: <517E4C9D02000078000D1812@nat28.tlf.novell.com> <5188320B.4090608@amd.com> <5188CFE002000078000D3B78@nat28.tlf.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <5188CFE002000078000D3B78@nat28.tlf.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich Cc: Jacob Shin , xen-devel List-Id: xen-devel@lists.xenproject.org On 5/7/2013 2:56 AM, Jan Beulich wrote: >>>> On 07.05.13 at 00:43, Suravee Suthikulanit wrote: >> >This looks fine and tested. Thanks for the patch. > Tested also underneath the multi-vector MSI series? I.e. did the > assertion you were hitting not get triggered anymore with this in > place, as expected? > > Thanks, Jan Yes, I have tested it with the previous set (the x86/IOMMU: multi-vector MSI) that I report the ASSERTION plus the change I made to fix the IOAPIC. With this additional patch, it was no longer asserting since nvec is now 1 (instead of 0 in prior case). Suravee