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Tue, 31 Mar 2020 11:33:38 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: tingwei) by smtp.codeaurora.org (Postfix) with ESMTPSA id 4AFA7C433F2; Tue, 31 Mar 2020 11:33:38 +0000 (UTC) MIME-Version: 1.0 Date: Tue, 31 Mar 2020 19:33:38 +0800 From: tingwei@codeaurora.org To: Will Deacon Subject: Re: [PATCH] arm64: hw_breakpoint: don't clear debug registers in halt mode In-Reply-To: <20200331074147.GA25612@willie-the-truck> References: <20200328083209.21793-1-tingwei@codeaurora.org> <20200330123946.GH1309@C02TD0UTHF1T.local> <20200330134218.GB10633@willie-the-truck> <2f4d076b2b21de3908f0821126d0c61e@codeaurora.org> <20200331074147.GA25612@willie-the-truck> Message-ID: <518d9ca9652c23bfc0e1831306144418@codeaurora.org> X-Sender: tingwei@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200331_123355_100720_86B6C839 X-CRM114-Status: GOOD ( 36.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Catalin Marinas , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Transfer-Encoding: base64 Content-Type: text/plain; charset="utf-8"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org 5ZyoIDIwMjAtMDMtMzEgMTU6NDHvvIxXaWxsIERlYWNvbiDlhpnpgZPvvJoKPiBPbiBUdWUsIE1h ciAzMSwgMjAyMCBhdCAxMDozOTo0MkFNICswODAwLCB0aW5nd2VpQGNvZGVhdXJvcmEub3JnIHdy b3RlOgo+PiDlnKggMjAyMC0wMy0zMCAyMTo0Mu+8jFdpbGwgRGVhY29uIOWGmemBk++8mgo+PiA+ IE9uIE1vbiwgTWFyIDMwLCAyMDIwIGF0IDAxOjM5OjQ2UE0gKzAxMDAsIE1hcmsgUnV0bGFuZCB3 cm90ZToKPj4gPiA+IE9uIFNhdCwgTWFyIDI4LCAyMDIwIGF0IDA0OjMyOjA5UE0gKzA4MDAsIFRp bmd3ZWkgWmhhbmcgd3JvdGU6Cj4+ID4gPiA+IElmIGV4dGVybmFsIGRlYnVnZ2VyIHNldHMgYSBi cmVha3BvaW50IGZvciBvbmUgS2VybmVsIGZ1bmN0aW9uCj4+ID4gPiA+IHdoZW4gZGV2aWNlIGlz IGluIGJvb3Rsb2FkZXIgbW9kZSBhbmQgbG9hZHMgS2VybmVsLCB0aGlzIGJyZWFrcG9pbnQKPj4g PiA+ID4gd2lsbCBiZSB3aXBlZCBvdXQgaW4gaHdfYnJlYWtwb2ludF9yZXNldCgpLiBUbyBmaXgg dGhpcywgY2hlY2sKPj4gPiA+ID4gTURTQ1JfRUwxLkhERSBpbiBod19icmVha3BvaW50X3Jlc2V0 KCkuIFdoZW4gTURTQ1JfRUwxLkhERSBpcwo+PiA+ID4gPiAwYjEsIGhhbHRpbmcgZGVidWcgaXMg ZW5hYmxlZC4gRG9uJ3QgcmVzZXQgZGVidWcgcmVnaXN0ZXJzIGluIHRoaXMKPj4gPiBjYXNlLgo+ PiA+ID4KPj4gPiA+IEkgZG9uJ3QgdGhpbmsgdGhpcyBpcyBzdWZmaWNpZW50LCBiZWNhdXNlIHRo ZSBrZXJuZWwgY2FuIHN0aWxsCj4+ID4gPiBzdWJzZXF1ZW50bHkgbWVzcyB3aXRoIGJyZWFrcG9p bnRzLCBhbmQgdGhlIEhXIGRlYnVnZ2VyIG1pZ2h0IG5vdCBiZQo+PiA+ID4gYXR0YWNoZWQgYXQg dGhpcyBwb2ludCBpbiB0aW1lIGFueWhvdy4KPj4gPiA+Cj4+ID4gPiBJIHJlY2tvbiB0aGlzIHNo b3VsZCBoYW5nIG9mZiB0aGUgZXhpc3RpbmcgIm5vZGVidW1vbiIgY29tbWFuZCBsaW5lCj4+ID4g PiBvcHRpb24sIGFuZCB3ZSBzaG91bGRuJ3QgdXNlIEhXIGJyZWFrcG9pbnRzIGF0IGFsbCB3aGVu IHRoYXQgaXMKPj4gPiA+IHBhc3NlZC4KPj4gPiA+IFRoZW4geW91IGNhbiBwYXNzIHRoYXQgdG8g cHJldmVudCB0aGUga2VybmVsIHN0b21waW5nIG9uIHRoZSBleHRlcm5hbAo+PiA+ID4gZGVidWdn ZXIuCj4+ID4gPgo+PiA+ID4gV2lsbCwgdGhvdWdodHM/Cj4+ID4KPj4gPiBJIHdhcyBnb2luZyB0 byBzdWdnZXN0IHRoZSBzYW1lIHRoaW5nLCBhbHRob3VnaCB3ZSB3aWxsIGFsc28gbmVlZCB0bwo+ PiA+IHRha2UKPj4gPiBjYXJlIHRvIHJlc2V0IHRoZSByZWdpc3RlcnMgaWYgIm5vZGVidWdtb24i IGlzIHRvZ2dsZWQgYXQgcnVudGltZSB2aWEKPj4gPiB0aGUKPj4gPiAiZGVidWdfZW5hYmxlZCIg ZmlsZSBpbiBkZWJ1Z2ZzLgo+PiA+Cj4+IFRoYW5rcyBmb3IgdGhlIHN1Z2dlc3Rpb24sIE1hcmsg YW5kIFdpbGwuIEl0J3MgYSBncmVhdCBpZGVhIHRvIHVzZQo+PiAibm9kZWJ1Z21vbiIuIFdoZW4g Im5vZGVidWdtb24iIGlzIHNldCwgS2VybmVsIHdvbid0IGNoYW5nZSBIVwo+PiBicmVha3BvaW50 cy4KPj4gCj4+IEZvciByZXNldCB0aGUgcmVnaXN0ZXJzIGFmdGVyICJkZWJ1Z19lbmFibGVkIiBp cyB0b2dnbGVkLCBJJ20gdGhpbmtpbmcgCj4+IGlmCj4+IHdlIGFyZSBhZGRpbmcgdW5uZWNlc3Nh cnkgY29tcGxleGl0eSBoZXJlLklmIHdlIHRha2UgdGhhdCBhcHByb2FjaCwgd2UKPj4gd2lsbAo+ PiBob29rICJkZWJ1Z19lbmFibGVkIiBpbnRlcmZhY2UgYW5kIHVzZSBzbXBfY2FsbF9mdW5jdGlv bl9zaW5nbGUoKSB0byAKPj4gY2FsbAo+PiBod19icmVha3BvaW50X3Jlc2V0KCkgb24gZWFjaCBD UFUuIFdhaXQgZm9yIGFsbCBDUFVzJyBleGVjdXRpb24gZG9uZSAKPj4gYW5kCj4+IGNoYW5nZSAi ZGVidWdfZW5hYmxlZCIuIEV4dGVybmFsIGRlYnVnZ2VyIHdvdWxkIGNsZWFyIHRoZSBicmVha3Bv aW50cyAKPj4gd2hlbgo+PiBpdCBkZXRhY2hlcyB0aGUgZGV2aWNlIGFuZCByZXN0b3JlcyBpdHMg YnJlYWtwb2ludHMgd2hlbiBhdHRhY2hlcyB0aGUKPj4gZGV2aWNlLgo+PiBBc3N1bWUgZGVidWdf ZW5hYmxlZCBpcyBjaGFuZ2VkIHRvIG9uZSBhZnRlciBleHRlcm5hbCBkZWJ1Z2dlciAKPj4gZGV0 YWNoZXMKPj4gdGhlCj4+IGRldmljZS4gRGVidWdnZXIgd291bGQgYWxyZWFkeSBjbGVhciB0aGUg YnJlYWtwb2ludCByZWdpc3RlcnMuIElmIAo+PiBkZWJnZ2VyCj4+IGlzCj4+IHN0aWxsIGF0dGFj aGVkLCB0aGVyZSdzIG5vdGhpbmcgS2VybmVsIGNhbiBkbyB0byBzdG9wIGl0IAo+PiByZXN0b3Jl cy9wcm9ncmFtcwo+PiB0aGUgYnJlYWtwb2ludCByZWdpc3RlcnMuCj4+IAo+PiBXaGF0IGRvIHlv dSB0aGluayBvZiB0aGlzPwo+IAo+IEl0J3MgYWxsIGEgYml0IG9mIGEgbWVzcy4gTG9va2luZyBh dCBpdCBzb21lIG1vcmUsIHdoeSBjYW4ndCB0aGUgCj4gZXh0ZXJuYWwKPiBkZWJ1Z2dlciBzaW1w bHkgdHJhcCBhY2Nlc3MgdG8gdGhlIGRlYnVnIHJlZ2lzdGVycyB1c2luZyBFRFNDUi5UREE/IAo+ IFRoYXQKPiB3YXksIHdlIGRvbid0IGhhdmUgdG8gY2hhbmdlIGFueXRoaW5nIGluIHRoZSBrZXJu ZWwuCj4gCj4gV2lsbAoKRXh0ZXJuYWwgZGVidWdnZXIgaGFzIHRoZSBmdW5jdGlvbiB0byB0cmFw IGFjY2VzcyB0byBkZWJ1ZyByZWdpc3RlcnMgCm5vdy4KV2hhdCBkbyB3ZSBleHBlY3QgZGVidWdn ZXIgdG8gZG8gYWZ0ZXIgY29yZSBpcyBzdG9wcGVkPyBTa2lwIHRoYXQgbXNyCmluc3RydWN0aW9u IGFuZCBjb250aW51ZSB0byBydW4/CgpUaW5nd2VpCgpfX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fXwpsaW51eC1hcm0ta2VybmVsIG1haWxpbmcgbGlzdApsaW51 eC1hcm0ta2VybmVsQGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5v cmcvbWFpbG1hbi9saXN0aW5mby9saW51eC1hcm0ta2VybmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A265C43331 for ; Tue, 31 Mar 2020 11:33:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0E2D720838 for ; Tue, 31 Mar 2020 11:33:51 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="c98iSUIA" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730498AbgCaLdu (ORCPT ); Tue, 31 Mar 2020 07:33:50 -0400 Received: from mail27.static.mailgun.info ([104.130.122.27]:23711 "EHLO mail27.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730343AbgCaLdt (ORCPT ); Tue, 31 Mar 2020 07:33:49 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1585654429; h=Message-ID: References: In-Reply-To: Subject: Cc: To: From: Date: Content-Transfer-Encoding: Content-Type: MIME-Version: Sender; bh=vd/RakK25qqtVWxb095aqA3ryPJv6ilQzlxzlSwno2k=; b=c98iSUIAo6BeOF7//N9JYdKRSqc4jFLVPVLqyphBtEbRzCTyeWzL2TaKjPIrjL7sEAZQhmog tTpnMtmiL+o/9uZrNpn6XNwLLdUIOhy/OA0B7EfVLnN9kQPxdYraIQt4bXYZ9dFRWIaA9maq RrhAGQ7bTbDNc3wpJ1rA5pXV59A= X-Mailgun-Sending-Ip: 104.130.122.27 X-Mailgun-Sid: WyI0MWYwYSIsICJsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnIiwgImJlOWU0YSJd Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by mxa.mailgun.org with ESMTP id 5e832a93.7fa599f2e1f0-smtp-out-n02; Tue, 31 Mar 2020 11:33:39 -0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1001) id E951BC43636; Tue, 31 Mar 2020 11:33:38 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: tingwei) by smtp.codeaurora.org (Postfix) with ESMTPSA id 4AFA7C433F2; Tue, 31 Mar 2020 11:33:38 +0000 (UTC) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Date: Tue, 31 Mar 2020 19:33:38 +0800 From: tingwei@codeaurora.org To: Will Deacon Cc: Mark Rutland , Catalin Marinas , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] arm64: hw_breakpoint: don't clear debug registers in halt mode In-Reply-To: <20200331074147.GA25612@willie-the-truck> References: <20200328083209.21793-1-tingwei@codeaurora.org> <20200330123946.GH1309@C02TD0UTHF1T.local> <20200330134218.GB10633@willie-the-truck> <2f4d076b2b21de3908f0821126d0c61e@codeaurora.org> <20200331074147.GA25612@willie-the-truck> Message-ID: <518d9ca9652c23bfc0e1831306144418@codeaurora.org> X-Sender: tingwei@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 在 2020-03-31 15:41，Will Deacon 写道： > On Tue, Mar 31, 2020 at 10:39:42AM +0800, tingwei@codeaurora.org wrote: >> 在 2020-03-30 21:42，Will Deacon 写道： >> > On Mon, Mar 30, 2020 at 01:39:46PM +0100, Mark Rutland wrote: >> > > On Sat, Mar 28, 2020 at 04:32:09PM +0800, Tingwei Zhang wrote: >> > > > If external debugger sets a breakpoint for one Kernel function >> > > > when device is in bootloader mode and loads Kernel, this breakpoint >> > > > will be wiped out in hw_breakpoint_reset(). To fix this, check >> > > > MDSCR_EL1.HDE in hw_breakpoint_reset(). When MDSCR_EL1.HDE is >> > > > 0b1, halting debug is enabled. Don't reset debug registers in this >> > case. >> > > >> > > I don't think this is sufficient, because the kernel can still >> > > subsequently mess with breakpoints, and the HW debugger might not be >> > > attached at this point in time anyhow. >> > > >> > > I reckon this should hang off the existing "nodebumon" command line >> > > option, and we shouldn't use HW breakpoints at all when that is >> > > passed. >> > > Then you can pass that to prevent the kernel stomping on the external >> > > debugger. >> > > >> > > Will, thoughts? >> > >> > I was going to suggest the same thing, although we will also need to >> > take >> > care to reset the registers if "nodebugmon" is toggled at runtime via >> > the >> > "debug_enabled" file in debugfs. >> > >> Thanks for the suggestion, Mark and Will. It's a great idea to use >> "nodebugmon". When "nodebugmon" is set, Kernel won't change HW >> breakpoints. >> >> For reset the registers after "debug_enabled" is toggled, I'm thinking >> if >> we are adding unnecessary complexity here.If we take that approach, we >> will >> hook "debug_enabled" interface and use smp_call_function_single() to >> call >> hw_breakpoint_reset() on each CPU. Wait for all CPUs' execution done >> and >> change "debug_enabled". External debugger would clear the breakpoints >> when >> it detaches the device and restores its breakpoints when attaches the >> device. >> Assume debug_enabled is changed to one after external debugger >> detaches >> the >> device. Debugger would already clear the breakpoint registers. If >> debgger >> is >> still attached, there's nothing Kernel can do to stop it >> restores/programs >> the breakpoint registers. >> >> What do you think of this? > > It's all a bit of a mess. Looking at it some more, why can't the > external > debugger simply trap access to the debug registers using EDSCR.TDA? > That > way, we don't have to change anything in the kernel. > > Will External debugger has the function to trap access to debug registers now. What do we expect debugger to do after core is stopped? Skip that msr instruction and continue to run? Tingwei