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([2a01:e0a:982:cbb0:bbf0:b69d:fecb:8006]) by smtp.gmail.com with ESMTPSA id az21-20020a05600c601500b003a31ca9dfb6sm3347611wmb.32.2022.08.10.07.01.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 10 Aug 2022 07:01:35 -0700 (PDT) Message-ID: <518f22f4-1582-924c-9eaa-28ebbe53a632@baylibre.com> Date: Wed, 10 Aug 2022 16:01:33 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCH] spi: meson-spicc: save pow2 datarate between messages Content-Language: en-US To: Mark Brown Cc: linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Da Xue References: <20220809152019.461741-1-narmstrong@baylibre.com> <39c2f53b-8f53-ceb1-ae0c-81e5e53d01aa@baylibre.com> From: Neil Armstrong Organization: Baylibre In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220810_070141_980395_194D5C73 X-CRM114-Status: GOOD ( 15.58 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org On 10/08/2022 14:37, Mark Brown wrote: > On Wed, Aug 10, 2022 at 11:17:14AM +0200, Neil Armstrong wrote: >> On 09/08/2022 17:27, Mark Brown wrote: >>> On Tue, Aug 09, 2022 at 05:20:19PM +0200, Neil Armstrong wrote: > >>> When you say the value set by the clock framework does that mean that >>> the clock driver is adjusting hardware inside the SPI controller IP >>> block which is then getting reset by the SPI driver without the SPI >>> driver knowing about it? That seems like a bad idea as you're finding >>> here. > >> The SPI driver is explicitely triggering a reset at the end of each message >> to get back to a clean HW state, but it does reset the content of the "legacy" >> registers containing the power of 2 divider value, the new registers configuring >> the new clock divider path (only on newer SoCs) doesn't get cleared. > > Sure, but that doesn't really address the concern - is this something > that the clk driver programmed or is this the driver forgetting to > restore a register that it programmed itself? The commit message sounds > like the former which is a much bigger problem. It's what is programmed by the Clock Framework yes, it was designed as-is so the Clock Framework takes the most accurate clock path but the reset case wasn't taken in account. Neil _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D6384C25B07 for ; Wed, 10 Aug 2022 14:01:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232909AbiHJOBk (ORCPT ); Wed, 10 Aug 2022 10:01:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39496 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232908AbiHJOBj (ORCPT ); Wed, 10 Aug 2022 10:01:39 -0400 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [IPv6:2a00:1450:4864:20::32d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C07F46CD35 for ; Wed, 10 Aug 2022 07:01:37 -0700 (PDT) Received: by mail-wm1-x32d.google.com with SMTP id ay12so5030061wmb.1 for ; Wed, 10 Aug 2022 07:01:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:in-reply-to:organization:from:references :cc:to:content-language:subject:user-agent:mime-version:date :message-id:from:to:cc; bh=dZA7yOywUXukdcu5pO+Io3zvJr55DJZjswrAfBadLys=; b=Yn8uEP++9IJloQ1BDCmMiI3k7Ee8qgEzlCEAYmHEDqta1P+Vib47gUxe6vH3H4XdOV OQkpMmnZbDPz5ZX+zt2N196uqkG5xcL5/Kx/Wb43oX4ErRJWdjMi0ew0lu/wjmc8Yjuy sFyHWISDMv2E9DqiHP1/J0w2EuhM24mGHNrb4Ifk62k07OzhsHShfSKkxVKjBCkYkmOC SfBZ5uckbvCi0a0mbgdNeZ2wy8YvQU/QtZtPC/PFahOvXfByRXvwnLyTDuPoMx64qAnG 4mFLpCptRa301NI9CDIrmS097PGpKW57ag53WZk2Gx6MJ05SzA6QUFllmNpPRl9jQWFN gfRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:organization:from:references :cc:to:content-language:subject:user-agent:mime-version:date :message-id:x-gm-message-state:from:to:cc; bh=dZA7yOywUXukdcu5pO+Io3zvJr55DJZjswrAfBadLys=; b=VoOWMGtbmSrOB/p68P2YLekDNb1v1jYZokErnWIiCfbeK23PFJiFyU2UNtyhu6MWsg lM6pttG9yebxqSYHKVoSovb0e6TMJ7rPeOeQQx+sLYS7LrMmL9m+ms3883zZfGXBCADH EehiQCdX1b2knPKpCqVXuiTpWi4vTn9jz9t/xG+TJsrmzC48WnNTphqf0BBjy9FUfNjA RBTLFFyO87fLrLZYvr9ctIeDYsIOH66rdnli36nHVCjQXVJwRqEXxWZuIqqIuqkAEjTO E0Rt68Z8CQLOH9FEhg9OLdeTthU4cmkffzXZOfNAjX1u7YKgBq+W4ffnODUUi+ilcTfY Pq+Q== X-Gm-Message-State: ACgBeo3Gs2qwiB0fEw88X4X6OEX/lblzxRxlT0pNYRGlK09yfU84zvU9 c1tov+X/pVQeegNwu8DAD2O6Gg== X-Google-Smtp-Source: AA6agR7DzgEgT3CgQhryxKIY8bUl9vYO/MdJ9kGHKEoVxRh7PUHU+GxrH0F86bCtL7LF92AxXsWGgg== X-Received: by 2002:a05:600c:1d1e:b0:3a5:4f8d:743f with SMTP id l30-20020a05600c1d1e00b003a54f8d743fmr2558911wms.121.1660140096061; Wed, 10 Aug 2022 07:01:36 -0700 (PDT) Received: from ?IPV6:2a01:e0a:982:cbb0:bbf0:b69d:fecb:8006? ([2a01:e0a:982:cbb0:bbf0:b69d:fecb:8006]) by smtp.gmail.com with ESMTPSA id az21-20020a05600c601500b003a31ca9dfb6sm3347611wmb.32.2022.08.10.07.01.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 10 Aug 2022 07:01:35 -0700 (PDT) Message-ID: <518f22f4-1582-924c-9eaa-28ebbe53a632@baylibre.com> Date: Wed, 10 Aug 2022 16:01:33 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCH] spi: meson-spicc: save pow2 datarate between messages Content-Language: en-US To: Mark Brown Cc: linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Da Xue References: <20220809152019.461741-1-narmstrong@baylibre.com> <39c2f53b-8f53-ceb1-ae0c-81e5e53d01aa@baylibre.com> From: Neil Armstrong Organization: Baylibre In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org On 10/08/2022 14:37, Mark Brown wrote: > On Wed, Aug 10, 2022 at 11:17:14AM +0200, Neil Armstrong wrote: >> On 09/08/2022 17:27, Mark Brown wrote: >>> On Tue, Aug 09, 2022 at 05:20:19PM +0200, Neil Armstrong wrote: > >>> When you say the value set by the clock framework does that mean that >>> the clock driver is adjusting hardware inside the SPI controller IP >>> block which is then getting reset by the SPI driver without the SPI >>> driver knowing about it? That seems like a bad idea as you're finding >>> here. > >> The SPI driver is explicitely triggering a reset at the end of each message >> to get back to a clean HW state, but it does reset the content of the "legacy" >> registers containing the power of 2 divider value, the new registers configuring >> the new clock divider path (only on newer SoCs) doesn't get cleared. > > Sure, but that doesn't really address the concern - is this something > that the clk driver programmed or is this the driver forgetting to > restore a register that it programmed itself? The commit message sounds > like the former which is a much bigger problem. It's what is programmed by the Clock Framework yes, it was designed as-is so the Clock Framework takes the most accurate clock path but the reset case wasn't taken in account. Neil From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 40501C00140 for ; Wed, 10 Aug 2022 14:03:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To:Subject: MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=RCC+Tb5fpAlFChg2pzL0DWLTVJaIMliNZmAP3Qfhb0c=; b=uh2u+1eBIkD7MK n7i20c+86CttDb62a8q2TNZYOwozVSEjwFe3RFyrVndtwJN7fs/k6jMNxev7WbrEgz269vltb3QHC yOHEm6J0umuMmAP7TDBtMrYHzAvvClmBxo7Tw4p50Q736j6OO7AjSK+CCEOAF67lP5KUix81ZrSlh oav9NMod5wAiifGgOvUarivpNMsc2khJ2SHUJ70gvyWSgOY6LQ75k5zohvdbUV+R/GRmO8u9KqeH+ KXYfzQrgg2f0yACW1QTGNPsTCT3hT+ZIWzNB4yQ6ScQY4VbJjSkRPUelHxHNYLF6+TC/nDVHbxNxH 3Jsq+ab1hYAzOd/ReFQQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oLmHJ-00CCSe-F9; Wed, 10 Aug 2022 14:01:45 +0000 Received: from mail-wm1-x32b.google.com ([2a00:1450:4864:20::32b]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oLmHF-00CCOL-Sk for linux-arm-kernel@lists.infradead.org; Wed, 10 Aug 2022 14:01:43 +0000 Received: by mail-wm1-x32b.google.com with SMTP id i128-20020a1c3b86000000b003a536d58f73so1048800wma.4 for ; Wed, 10 Aug 2022 07:01:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:in-reply-to:organization:from:references :cc:to:content-language:subject:user-agent:mime-version:date :message-id:from:to:cc; bh=dZA7yOywUXukdcu5pO+Io3zvJr55DJZjswrAfBadLys=; b=Yn8uEP++9IJloQ1BDCmMiI3k7Ee8qgEzlCEAYmHEDqta1P+Vib47gUxe6vH3H4XdOV OQkpMmnZbDPz5ZX+zt2N196uqkG5xcL5/Kx/Wb43oX4ErRJWdjMi0ew0lu/wjmc8Yjuy sFyHWISDMv2E9DqiHP1/J0w2EuhM24mGHNrb4Ifk62k07OzhsHShfSKkxVKjBCkYkmOC SfBZ5uckbvCi0a0mbgdNeZ2wy8YvQU/QtZtPC/PFahOvXfByRXvwnLyTDuPoMx64qAnG 4mFLpCptRa301NI9CDIrmS097PGpKW57ag53WZk2Gx6MJ05SzA6QUFllmNpPRl9jQWFN gfRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:organization:from:references :cc:to:content-language:subject:user-agent:mime-version:date :message-id:x-gm-message-state:from:to:cc; bh=dZA7yOywUXukdcu5pO+Io3zvJr55DJZjswrAfBadLys=; b=Epoi59n5n3BrINMhInncNABA1OgfVaNQBhtGDYjI0mV84aGAxdLe40oQVrFmTQapZj 1sylkJgP2rr0+rn/qx9TRQ2pV4N5YVG7+IHzr1D8I96gBoYZIaiJ+yj0kRGrSx5YOrIC OG4TBiCiq++fFDiDLiRzOQ4SHl9q9m0NeFm6PwoCnq7iIr8A/WD0l5Mb2nUMz+LgNkK6 2VBJmMpgiIxRtKpnpUd1JrTzPkpZBVAxswZ2YgGhm4fT/cd3FhjJeDmGWiA8MGp6GD9q BfRHcoUGHADcXOHSci2pEaOrWNiLAELv8euU2UYF5UTCoqWE0ttD0Ckb4UIDgdSg3bRM gopQ== X-Gm-Message-State: ACgBeo3cYo94OqSi0ryRs8RrHf9kB6ilWtzsEbIaHvgN0yQvy8hOSfYr Mx286mW0lgPwPdk2CzmZqs+rqA== X-Google-Smtp-Source: AA6agR7DzgEgT3CgQhryxKIY8bUl9vYO/MdJ9kGHKEoVxRh7PUHU+GxrH0F86bCtL7LF92AxXsWGgg== X-Received: by 2002:a05:600c:1d1e:b0:3a5:4f8d:743f with SMTP id l30-20020a05600c1d1e00b003a54f8d743fmr2558911wms.121.1660140096061; Wed, 10 Aug 2022 07:01:36 -0700 (PDT) Received: from ?IPV6:2a01:e0a:982:cbb0:bbf0:b69d:fecb:8006? ([2a01:e0a:982:cbb0:bbf0:b69d:fecb:8006]) by smtp.gmail.com with ESMTPSA id az21-20020a05600c601500b003a31ca9dfb6sm3347611wmb.32.2022.08.10.07.01.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 10 Aug 2022 07:01:35 -0700 (PDT) Message-ID: <518f22f4-1582-924c-9eaa-28ebbe53a632@baylibre.com> Date: Wed, 10 Aug 2022 16:01:33 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCH] spi: meson-spicc: save pow2 datarate between messages Content-Language: en-US To: Mark Brown Cc: linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Da Xue References: <20220809152019.461741-1-narmstrong@baylibre.com> <39c2f53b-8f53-ceb1-ae0c-81e5e53d01aa@baylibre.com> From: Neil Armstrong Organization: Baylibre In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220810_070141_979715_95979D16 X-CRM114-Status: GOOD ( 17.30 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 10/08/2022 14:37, Mark Brown wrote: > On Wed, Aug 10, 2022 at 11:17:14AM +0200, Neil Armstrong wrote: >> On 09/08/2022 17:27, Mark Brown wrote: >>> On Tue, Aug 09, 2022 at 05:20:19PM +0200, Neil Armstrong wrote: > >>> When you say the value set by the clock framework does that mean that >>> the clock driver is adjusting hardware inside the SPI controller IP >>> block which is then getting reset by the SPI driver without the SPI >>> driver knowing about it? That seems like a bad idea as you're finding >>> here. > >> The SPI driver is explicitely triggering a reset at the end of each message >> to get back to a clean HW state, but it does reset the content of the "legacy" >> registers containing the power of 2 divider value, the new registers configuring >> the new clock divider path (only on newer SoCs) doesn't get cleared. > > Sure, but that doesn't really address the concern - is this something > that the clk driver programmed or is this the driver forgetting to > restore a register that it programmed itself? The commit message sounds > like the former which is a much bigger problem. It's what is programmed by the Clock Framework yes, it was designed as-is so the Clock Framework takes the most accurate clock path but the reset case wasn't taken in account. Neil _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel