Hello all, Attached patch adds support for secondary SMBus of AMD SB800 and new AMD FCH chipsets. The base address of secondary SMBus is different from SB700 and it is stored on similar place as SB800 primary SMBus. More verbose info: Probing function was just modified to read the SMBus base from address 0x28 or from original 0x2c. The secondary bus does not provide IRQ information. I think the SB700 has same secondary controller, so revision/IRQ information should not be printed too. This can be fixed in some other patch. Chipset datasheet can be found here: http://support.amd.com/us/Embedded_TechDocs/45482.pdf Tested on SB800 and FCH boards. Tested-by: Paul Menzel ASRock E350M1 with SB800 Signed-off-by: Rudolf Marek Thanks Rudolf