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From: Richard Henderson <rth@twiddle.net>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "John Rigby" <john.rigby@linaro.org>,
	patches@linaro.org, qemu-devel@nongnu.org,
	"Blue Swirl" <blauwirbel@gmail.com>,
	"Andreas Färber" <afaerber@suse.de>,
	"Aurelien Jarno" <aurelien@aurel32.net>
Subject: Re: [Qemu-devel] [PATCH 01/10] target-arm: Don't use TCGv when we mean TCGv_i32
Date: Thu, 23 May 2013 09:43:21 -0700	[thread overview]
Message-ID: <519E4729.3060109@twiddle.net> (raw)
In-Reply-To: <1369310404-5285-2-git-send-email-peter.maydell@linaro.org>

On 05/23/2013 04:59 AM, Peter Maydell wrote:
> TCGv changes size depending on the compile time value of
> TARGET_LONG_BITS.  This is useful for generating code for MIPS style
> "instructions are the same but the register width changes" CPUs, and
> also for the generic bits of QEMU which operate on "width of a
> virtual address" values, but mostly in the ARM target code we were
> using it purely as a shorthand for "any 32 bit value".
> 
> This needs to change in preparation for AArch64 support, since an
> AArch64-capable v8 core will have 64 bit virtual addresses but still
> use 32 bit values for the 32 bit instruction set.
> 
> This patch mechanically converts all the occurrences of TCGv,
> tcg_temp_new(), tcg_temp_free(), tcg_temp_local_new() and
> TCGV_UNUSED() to their explicitly 32 bit counterparts.  This is
> correct for everything except the arguments to tcg_gen_qemu_{ld,st}*,
> which really do need to be TCGv and so will require a 32-to-64
> conversion when building the 32 bit code for AArch64.  Those changes
> will be in a separate patch for easier review.
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  target-arm/translate.c |  453 ++++++++++++++++++++++++------------------------
>  1 file changed, 229 insertions(+), 224 deletions(-)

Reviewed-by: Richard Henderson <rth@twiddle.net>


r~

  reply	other threads:[~2013-05-23 16:43 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-05-23 11:59 [Qemu-devel] [PATCH 00/10] target-arm: fix TCGv usage (AArch64 prep) Peter Maydell
2013-05-23 11:59 ` [Qemu-devel] [PATCH 01/10] target-arm: Don't use TCGv when we mean TCGv_i32 Peter Maydell
2013-05-23 16:43   ` Richard Henderson [this message]
2013-05-23 11:59 ` [Qemu-devel] [PATCH 02/10] target-arm: Remove gen_ld64() and gen_st64() Peter Maydell
2013-05-23 16:44   ` Richard Henderson
2013-05-23 11:59 ` [Qemu-devel] [PATCH 03/10] target-arm: Remove uses of gen_{ld, st}* from iWMMXt code Peter Maydell
2013-05-23 16:46   ` Richard Henderson
2013-05-23 11:59 ` [Qemu-devel] [PATCH 04/10] target-arm: Remove uses of gen_{ld, st}* from Neon code Peter Maydell
2013-05-23 11:59 ` [Qemu-devel] [PATCH 05/10] target-arm: Remove use of gen_{ld, st}* from ldrex/strex Peter Maydell
2013-05-23 12:00 ` [Qemu-devel] [PATCH 06/10] target-arm: Remove gen_{ld, st}* from basic ARM insns Peter Maydell
2013-05-23 12:00 ` [Qemu-devel] [PATCH 07/10] target-arm: Remove gen_{ld, st}* from Thumb insns Peter Maydell
2013-05-23 12:00 ` [Qemu-devel] [PATCH 08/10] target-arm: Remove gen_{ld, st}* from thumb2 decoder Peter Maydell
2013-05-23 12:00 ` [Qemu-devel] [PATCH 09/10] target-arm: Remove gen_{ld, st}* definitions Peter Maydell
2013-05-23 12:00 ` [Qemu-devel] [PATCH 10/10] target-arm: Abstract out load/store from a vaddr in AArch32 Peter Maydell
2013-05-23 16:53   ` Richard Henderson
2013-05-24 15:54   ` Peter Maydell
2013-05-26 17:03 ` [Qemu-devel] [PATCH 00/10] target-arm: fix TCGv usage (AArch64 prep) Blue Swirl

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