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diff for duplicates of <51A7737A.5000902@ti.com>

diff --git a/a/1.txt b/N1/1.txt
index 93c840f..581b537 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,8 +1,8 @@
 On 05/30/2013 05:18 PM, Kevin Hilman wrote:
-> Oleksandr Dmytryshyn <oleksandr.dmytryshyn-l0cyMroinI0@public.gmane.org> writes:
+> Oleksandr Dmytryshyn <oleksandr.dmytryshyn@ti.com> writes:
 >
 >> On 05/29/2013 08:22 PM, Kevin Hilman wrote:
->>> Oleksandr Dmytryshyn <oleksandr.dmytryshyn-l0cyMroinI0@public.gmane.org> writes:
+>>> Oleksandr Dmytryshyn <oleksandr.dmytryshyn@ti.com> writes:
 >>>
 >>>> Starting from the OMAP chips with version2 registers scheme there are
 >>>> 2 registers (I2C_IRQENABLE_SET and I2C_IRQENABLE_CLR) to manage
diff --git a/a/content_digest b/N1/content_digest
index fd68976..66d0a4b 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -3,23 +3,22 @@
  "ref\0878v2x7lak.fsf@linaro.org\0"
  "ref\051A71375.9030100@ti.com\0"
  "ref\087obbsa6vh.fsf@linaro.org\0"
- "ref\087obbsa6vh.fsf-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org\0"
- "From\0Oleksandr Dmytryshyn <oleksandr.dmytryshyn-l0cyMroinI0@public.gmane.org>\0"
+ "From\0Oleksandr Dmytryshyn <oleksandr.dmytryshyn@ti.com>\0"
  "Subject\0Re: [PATCH 1/1] i2c: omap: correct usage of the interrupt enable register\0"
  "Date\0Thu, 30 May 2013 18:42:50 +0300\0"
- "To\0Kevin Hilman <khilman-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\0"
- "Cc\0Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>"
-  Wolfram Sang <wsa-z923LK4zBo2bacvFa/9K2g@public.gmane.org>
-  linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
- " linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0"
+ "To\0Kevin Hilman <khilman@linaro.org>\0"
+ "Cc\0Tony Lindgren <tony@atomide.com>"
+  Wolfram Sang <wsa@the-dreams.de>
+  <linux-omap@vger.kernel.org>
+  <linux-i2c@vger.kernel.org>
+ " <linux-kernel@vger.kernel.org>\0"
  "\00:1\0"
  "b\0"
  "On 05/30/2013 05:18 PM, Kevin Hilman wrote:\n"
- "> Oleksandr Dmytryshyn <oleksandr.dmytryshyn-l0cyMroinI0@public.gmane.org> writes:\n"
+ "> Oleksandr Dmytryshyn <oleksandr.dmytryshyn@ti.com> writes:\n"
  ">\n"
  ">> On 05/29/2013 08:22 PM, Kevin Hilman wrote:\n"
- ">>> Oleksandr Dmytryshyn <oleksandr.dmytryshyn-l0cyMroinI0@public.gmane.org> writes:\n"
+ ">>> Oleksandr Dmytryshyn <oleksandr.dmytryshyn@ti.com> writes:\n"
  ">>>\n"
  ">>>> Starting from the OMAP chips with version2 registers scheme there are\n"
  ">>>> 2 registers (I2C_IRQENABLE_SET and I2C_IRQENABLE_CLR) to manage\n"
@@ -75,4 +74,4 @@
  "Oleksandr Dmytryshyn | OMAP4 Platform\n"
  GlobalLogic Inc. | Innovation by Design
 
-7cddb798c638e9076e88e0b9f115caddeb26adaa7b034933c58e67974eb7ec1d
+b95fe332f057bac8be6774de2c49c8ffa7fb3afb479b0a2cdd4dec2692791577

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