From: David Daney <ddaney.cavm@gmail.com>
To: "Steven J. Hill" <Steven.Hill@imgtec.com>, ralf@linux-mips.org
Cc: linux-mips@linux-mips.org
Subject: Re: [PATCH v4] MIPS: micromips: Fix improper definition of ISA exception bit.
Date: Wed, 05 Jun 2013 11:20:58 -0700 [thread overview]
Message-ID: <51AF818A.6020400@gmail.com> (raw)
In-Reply-To: <1370455529-19621-1-git-send-email-Steven.Hill@imgtec.com>
On 06/05/2013 11:05 AM, Steven J. Hill wrote:
> The ISA exception bit selects whether exceptions are taken in classic
> or microMIPS mode. This bit is Config3.ISAOnExc and was improperly
> defined as bits 16 and 17 instead of just bit 16. A new function was
> added so that platforms could set this bit when running a kernel
> compiled with only microMIPS instructions.
>
> Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
This looks good now,
Acked-by: David Daney <david.daney@cavium.com>
> ---
> Changes in v4:
> * Removed code from 'cpu-probe.c' and added new inline function to
> set exception mode.
> * Reworded and simplified commit message.
>
> arch/mips/include/asm/mipsregs.h | 17 ++++++++++++++++-
> arch/mips/kernel/cpu-probe.c | 3 ---
> arch/mips/mti-malta/malta-init.c | 2 ++
> arch/mips/mti-sead3/sead3-init.c | 2 ++
> 4 files changed, 20 insertions(+), 4 deletions(-)
>
next prev parent reply other threads:[~2013-06-05 18:21 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-05 18:05 [PATCH v4] MIPS: micromips: Fix improper definition of ISA exception bit Steven J. Hill
2013-06-05 18:20 ` David Daney [this message]
2013-06-05 19:08 ` Maciej W. Rozycki
2013-06-05 19:12 ` David Daney
2013-06-05 19:26 ` Maciej W. Rozycki
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