[Qemu-devel] SEV and WFE instructions on ARM

[Sebastian Huber <sebastian.huber@embedded-brains.de>]

Hello,

I want to use Qemu to test some SMP code.  For this I set up Qemu to fire up 
two Cortex-A9 MPCore CPUs.  I have the following ticket lock implementation:

static inline void _ARM_Data_memory_barrier( void )
{
   __asm__ volatile ( "dmb" : : : "memory" );
}

static inline void _ARM_Data_synchronization_barrier( void )
{
   __asm__ volatile ( "dsb" : : : "memory" );
}

static inline void _ARM_Send_event( void )
{
   __asm__ volatile ( "sev" : : : "memory" );
}

static inline void _ARM_Wait_for_event( void )
{
   __asm__ volatile ( "wfe" : : : "memory" );
}

typedef struct {
   uint32_t next_ticket;
   uint32_t now_serving;
} CPU_SMP_lock_Control;

#define CPU_SMP_LOCK_INITIALIZER { 0, 0 }

static inline void _CPU_SMP_lock_Acquire( CPU_SMP_lock_Control *lock )
{
   uint32_t my_ticket;
   uint32_t next_ticket;
   uint32_t status;

   __asm__ volatile (
     "1: ldrex %[my_ticket], [%[next_ticket_addr]]\n"
     "add %[next_ticket], %[my_ticket], #1\n"
     "strex %[status], %[next_ticket], [%[next_ticket_addr]]\n"
     "teq %[status], #0\n"
     "bne 1b"
     : [my_ticket] "=&r" (my_ticket),
       [next_ticket] "=&r" (next_ticket),
       [status] "=&r" (status)
     : [next_ticket_addr] "r" (&lock->next_ticket)
     : "cc", "memory"
   );

   while ( my_ticket != lock->now_serving ) {
     _ARM_Wait_for_event();
   }

   _ARM_Data_memory_barrier();
}

static inline void _CPU_SMP_lock_Release( CPU_SMP_lock_Control *lock )
{
   _ARM_Data_memory_barrier();
   ++lock->now_serving;
   _ARM_Data_synchronization_barrier();
   _ARM_Send_event();
}

I run the following code on both CPUs:

while (1) {
   _CPU_SMP_lock_Acquire(&lock);
   ++global_counter;
   _CPU_SMP_lock_Release(&lock);
}

It seems that the SEV/WFE instructions are implemented as a nop on Qemu (see in 
file "target-arm/translate.c" function gen_nop_hint()).  So the simulator 
executes the busy wait loop most of the time.  Is it possible to trigger a 
schedule event in Qemu which stops the simulation on one CPU and selects 
another CPU instead?

-- 
Sebastian Huber, embedded brains GmbH

Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone   : +49 89 189 47 41-16
Fax     : +49 89 189 47 41-09
E-Mail  : sebastian.huber@embedded-brains.de
PGP     : Public key available on request.

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