All of lore.kernel.org
 help / color / mirror / Atom feed
diff for duplicates of <51B21105.1080301@wwwdotorg.org>

diff --git a/a/1.txt b/N1/1.txt
index c6720ba..c101e5a 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -7,7 +7,7 @@ On 06/07/2013 06:19 AM, Paul Walmsley wrote:
 > line, the DVCO will not oscillate, although reads and writes to the
 > DFLL IP block will complete.
 > 
-> Thanks to Aleksandr Frid <afrid-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> for identifying this and
+> Thanks to Aleksandr Frid <afrid@nvidia.com> for identifying this and
 > saving hours of debugging time.
 
 > diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h
diff --git a/a/content_digest b/N1/content_digest
index 6e11d55..5c5db4e 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,17 +1,9 @@
  "ref\020130607121505.21868.72360.stgit@dusk.lan\0"
  "ref\020130607121901.21868.65416.stgit@dusk.lan\0"
- "ref\020130607121901.21868.65416.stgit-orwA252wQtA@public.gmane.org\0"
- "From\0Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>\0"
- "Subject\0Re: [PATCH 3/3] clk: tegra: T114: add DFLL DVCO reset control\0"
+ "From\0swarren@wwwdotorg.org (Stephen Warren)\0"
+ "Subject\0[PATCH 3/3] clk: tegra: T114: add DFLL DVCO reset control\0"
  "Date\0Fri, 07 Jun 2013 10:57:41 -0600\0"
- "To\0Paul Walmsley <pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0"
- "Cc\0linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
-  mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org
-  Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
-  Aleksandr Frid <afrid-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
-  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
- " Prashant Gaikwad <pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "On 06/07/2013 06:19 AM, Paul Walmsley wrote:\n"
@@ -23,7 +15,7 @@
  "> line, the DVCO will not oscillate, although reads and writes to the\n"
  "> DFLL IP block will complete.\n"
  "> \n"
- "> Thanks to Aleksandr Frid <afrid-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> for identifying this and\n"
+ "> Thanks to Aleksandr Frid <afrid@nvidia.com> for identifying this and\n"
  "> saving hours of debugging time.\n"
  "\n"
  "> diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h\n"
@@ -47,4 +39,4 @@
  "provider, hence removing the existing custom\n"
  tegra_periph_reset_{de,}assert() APIs.
 
-d44983763f25ed12d1f4a90dd7afac409b9ae42cbd9fdbf92f71bee5db8729b6
+dac3246e36a92ffa36c9dd988cba492e94372a9f99c6a9cd3dfd140c6b6df45d

diff --git a/a/1.txt b/N2/1.txt
index c6720ba..c101e5a 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -7,7 +7,7 @@ On 06/07/2013 06:19 AM, Paul Walmsley wrote:
 > line, the DVCO will not oscillate, although reads and writes to the
 > DFLL IP block will complete.
 > 
-> Thanks to Aleksandr Frid <afrid-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> for identifying this and
+> Thanks to Aleksandr Frid <afrid@nvidia.com> for identifying this and
 > saving hours of debugging time.
 
 > diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h
diff --git a/a/content_digest b/N2/content_digest
index 6e11d55..968a199 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,17 +1,16 @@
  "ref\020130607121505.21868.72360.stgit@dusk.lan\0"
  "ref\020130607121901.21868.65416.stgit@dusk.lan\0"
- "ref\020130607121901.21868.65416.stgit-orwA252wQtA@public.gmane.org\0"
- "From\0Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>\0"
+ "From\0Stephen Warren <swarren@wwwdotorg.org>\0"
  "Subject\0Re: [PATCH 3/3] clk: tegra: T114: add DFLL DVCO reset control\0"
  "Date\0Fri, 07 Jun 2013 10:57:41 -0600\0"
- "To\0Paul Walmsley <pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0"
- "Cc\0linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
-  mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org
-  Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
-  Aleksandr Frid <afrid-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
-  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
- " Prashant Gaikwad <pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0"
+ "To\0Paul Walmsley <pwalmsley@nvidia.com>\0"
+ "Cc\0linux-tegra@vger.kernel.org"
+  mturquette@linaro.org
+  Peter De Schrijver <pdeschrijver@nvidia.com>
+  Aleksandr Frid <afrid@nvidia.com>
+  linux-kernel@vger.kernel.org
+  linux-arm-kernel@lists.infradead.org
+ " Prashant Gaikwad <pgaikwad@nvidia.com>\0"
  "\00:1\0"
  "b\0"
  "On 06/07/2013 06:19 AM, Paul Walmsley wrote:\n"
@@ -23,7 +22,7 @@
  "> line, the DVCO will not oscillate, although reads and writes to the\n"
  "> DFLL IP block will complete.\n"
  "> \n"
- "> Thanks to Aleksandr Frid <afrid-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> for identifying this and\n"
+ "> Thanks to Aleksandr Frid <afrid@nvidia.com> for identifying this and\n"
  "> saving hours of debugging time.\n"
  "\n"
  "> diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h\n"
@@ -47,4 +46,4 @@
  "provider, hence removing the existing custom\n"
  tegra_periph_reset_{de,}assert() APIs.
 
-d44983763f25ed12d1f4a90dd7afac409b9ae42cbd9fdbf92f71bee5db8729b6
+56ffb73cc3bc4b808000de17de02f2f8f0271f05aa42270932551edfa86c1ecb

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.