From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pd0-f171.google.com (mail-pd0-f171.google.com [209.85.192.171]) by yocto-www.yoctoproject.org (Postfix) with ESMTP id 34728E01541 for ; Tue, 18 Jun 2013 08:39:19 -0700 (PDT) Received: by mail-pd0-f171.google.com with SMTP id y14so4046705pdi.2 for ; Tue, 18 Jun 2013 08:39:19 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=message-id:date:from:user-agent:mime-version:to:cc:subject :references:in-reply-to:content-type:content-transfer-encoding :x-gm-message-state; bh=+7DF14BBewfApRyMZgb+YYg8jqgs7dDu1d+7Es75DpQ=; b=ch/vW/JeRg6pMaQYrC94hRe7w5YxelJDjW5RewY6GGXWnKvU1n3ps+ufx2/HUm+Ewa BUx+9dM2eC/xm3ExwgKlF67eUtZxL534wc3h39fqtJIltWyxHljFCakPkJQPn26O6k4W I/dRThmXgkeQphyRNP3HcwhdFM1WLufqj0zW61eG0PCAXkprJjXKiPa9z336R92DNMpY 04npb1iOZcsNMNN1q4QBSUt8+nIbtQ992QShWfx24JnKoO+XyiN+dL7idDFOqOhq1O8i 6lex4xOMROphYgNflOdgNPjJ01QczOrZm2leFvtU5Nq8eh/GNycAQfh66gn/VsG+MvPd lOvw== X-Received: by 10.68.197.66 with SMTP id is2mr17637420pbc.175.1371569959297; Tue, 18 Jun 2013 08:39:19 -0700 (PDT) Received: from [192.168.0.55] ([70.96.116.236]) by mx.google.com with ESMTPSA id pe9sm18750496pbc.35.2013.06.18.08.39.16 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 18 Jun 2013 08:39:18 -0700 (PDT) Message-ID: <51C07F23.80108@boundarydevices.com> Date: Tue, 18 Jun 2013 08:39:15 -0700 From: Eric Nelson User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130510 Thunderbird/17.0.6 MIME-Version: 1.0 To: SARTRE Leo References: <1371224103-1706-1-git-send-email-lsartre@adeneo-embedded.com> <3465D313FDFB824F9A9C8CD24FA4F6BC0108CD2B@frontmail.adetel.com> <3465D313FDFB824F9A9C8CD24FA4F6BC0108CD2C@frontmail.adetel.com> In-Reply-To: <3465D313FDFB824F9A9C8CD24FA4F6BC0108CD2C@frontmail.adetel.com> X-Gm-Message-State: ALoCoQmEbNRe8xuTOCzOz8irmTukY3wza0uCtZ6jSKz/ka2WRscN1p5z+voUg/yZDcq3hjM2yKI6 Cc: meta-freescale@yoctoproject.org, Otavio Salvador Subject: Re: [meta-fsl-arm-extra][PATCH 1/2] u-boot-imx: update Congatec qmx6 support to bsp 4.0 X-BeenThere: meta-freescale@yoctoproject.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Usage and development list for the meta-fsl-* layers List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 18 Jun 2013 15:39:20 -0000 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Hi Leo, On 06/18/2013 07:27 AM, SARTRE Leo wrote: > > If you have your boot pins (or fuses) correctly setup and flash it to > > the correct offset, it should just boot, no? > > > > When I try to flash a mainline U-boot (that works when I write it in SD > card) > into the SPI NOR, the board doesn't boot. > The binary that I flash is a non-padded Uboot and I place it at the > beggining > of the SPI NOR. > It seems that the same issue occurs with the sabrelite board (see > https://wiki.linaro.org/Boards/MX6QSabreLite). > This isn't an issue, it's a policy decision by Linaro because they wanted to **force** SD card boot. This Linaro hack programs SPI-NOR to override the fuses. In other words, it too boots to SPI NOR. > > I don't understand why you say that mainline U-boot cannot boot from > > SPI NOR, but the old U-boot can. > > Maybe some bits of code maintained by Freescale were not pushed to the > mainline of U-boot. > Can you boot with an erased SPI-NOR and a U-Boot on SD card? If so, then your fuses are blown to select SD card boot. Regards, Eric