Re: [PATCH 2/2] kvm-unit-tests: Change two cases to use trap_emulator

[Paolo Bonzini <pbonzini@redhat.com>]

Il 19/06/2013 17:00, Arthur Chunqi Li ha scritto:
>  static void test_movabs(uint64_t *mem, uint8_t *insn_page,
>  		       uint8_t *alt_insn_page, void *insn_ram)
>  {
> -    uint64_t val = 0;
> -    ulong *cr3 = (ulong *)read_cr3();
> -
> -    // Pad with RET instructions
> -    memset(insn_page, 0xc3, 4096);
> -    memset(alt_insn_page, 0xc3, 4096);
> -    // Place a trapping instruction in the page to trigger a VMEXIT
> -    insn_page[0] = 0x89; // mov %eax, (%rax)
> -    insn_page[1] = 0x00;
> -    // Place the instruction we want the hypervisor to see in the alternate
> -    // page. A buggy hypervisor will fetch a 32-bit immediate and return
> -    // 0xffffffffc3c3c3c3.
> -    alt_insn_page[0] = 0x48; // mov $0xc3c3c3c3c3c3c3c3, %rcx
> -    alt_insn_page[1] = 0xb9;
> -
> -    // Load the code TLB with insn_page, but point the page tables at
> -    // alt_insn_page (and keep the data TLB clear, for AMD decode assist).
> -    // This will make the CPU trap on the insn_page instruction but the
> -    // hypervisor will see alt_insn_page.
> -    install_page(cr3, virt_to_phys(insn_page), insn_ram);
> -    // Load code TLB
> -    invlpg(insn_ram);
> -    asm volatile("call *%0" : : "r"(insn_ram + 3));
> -    // Trap, let hypervisor emulate at alt_insn_page
> -    install_page(cr3, virt_to_phys(alt_insn_page), insn_ram);
> -    asm volatile("call *%1" : "=c"(val) : "r"(insn_ram), "a"(mem), "c"(0));
> -    report("64-bit mov imm", val == 0xc3c3c3c3c3c3c3c3);
> +    // mov $0xc3c3c3c3c3c3c3c3, %rcx
> +    uint8_t alt_insn[] = {0x48, 0xb9, 0xc3, 0xc3, 0xc3,
> +					0xc3, 0xc3, 0xc3, 0xc3, 0xc3};
> +    inregs = (struct regs){ 0 };
> +    trap_emulator(mem, alt_insn, 10);
> +    report("64-bit mov imm2", outregs.rcx == 0xc3c3c3c3c3c3c3c3);
>  }

0xc3 is ret and it may mess up the test case if the buggy hypervisor
sees it as

    mov $0xc3c3c3c3, %rcx (sign extended, no such instruction exists)
    ret
    ret
    ret
    ret

I suggest changing it to 0x90 as part of this patch.

Paolo