From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53177) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Uq5oV-00039N-5W for qemu-devel@nongnu.org; Fri, 21 Jun 2013 14:12:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Uq5oU-0002pk-2d for qemu-devel@nongnu.org; Fri, 21 Jun 2013 14:11:59 -0400 Received: from goliath.siemens.de ([192.35.17.28]:19142) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Uq5oT-0002pT-QH for qemu-devel@nongnu.org; Fri, 21 Jun 2013 14:11:58 -0400 Message-ID: <51C4976B.7020806@siemens.com> Date: Fri, 21 Jun 2013 20:11:55 +0200 From: Jan Kiszka MIME-Version: 1.0 References: <1370713446-9460-1-git-send-email-hpoussin@reactos.org> <51BE01D3.1050709@reactos.org> <51BEBB83.7050207@redhat.com> <51BEBE28.4010004@siemens.com> <51BF73FD.6070103@reactos.org> <51C070D9.2050007@siemens.com> <51C0A240.3040002@reactos.org> In-Reply-To: <51C0A240.3040002@reactos.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v2 0/8] memory: remove old_portio usage List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?B?SGVydsOpIFBvdXNzaW5lYXU=?= Cc: Paolo Bonzini , "qemu-devel@nongnu.org" On 2013-06-18 20:09, Herv=C3=A9 Poussineau wrote: > Jan Kiszka a =C3=A9crit : >> On 2013-06-17 22:39, Herv=C3=A9 Poussineau wrote: >>> Jan Kiszka a =C3=A9crit : >>>> On 2013-06-17 09:32, Paolo Bonzini wrote: >>>>> Il 16/06/2013 20:20, Herv=C3=A9 Poussineau ha scritto: >>>>>> Herv=C3=A9 Poussineau a =C3=A9crit : >>>>>>> These proposed patches aim at removing the .old_portio member of >>>>>>> MemoryRegionOps structure, and replacing their usage by .read/.wr= ite >>>>>>> handlers. >>>>>> Ping. >>>>> Jan has patches that do something similar, so I was hoping he'd loo= k at it. >>>>> >>>>> Jan, are you back from vacation? :) >>>> Yes, and that is the problem. ;) >>>> >>>> >From a quick glance, I'm a bit skeptical, Herv=C3=A9, that your pat= ches are >>>> addressing all corner cases like mine. Did you see >>>> http://thread.gmane.org/gmane.comp.emulators.qemu/210188? >>>> >>>> Jan >>>> >>> My patches are less intrusive than yours, because they are probably l= ess=20 >>> complex. They don't change subpage handling, they don't remove the=20 >>> register_ioport_*, and they don't move ioport handling to memory core. >>> >>> However, my patches do not add a new base address field in MemoryRegi= on,=20 >>> and also simplify cpu_in/out to be simply a call to=20 >>> address_space_read/write (like yours). >>> >>> I don't really care whatever way is chosen. I'm only interested to be= =20 >>> able to put I/O address space into memory space, so I can improve PRe= P=20 >>> emulation. >> >> Refactorings like the subpage changes are required to break up the BQL >> also for PIO dispatching. So we need the complete rework. But, of >> course, I'm open for improvement suggestions. >> >> I'm planning to rebase my series on top of Paolo's changes soon and wi= ll >> then post. Would you mind rebasing what you need additionally on top o= f >> that? >=20 > Not a problem. > Moreover, with your patches, if devices registering ports with portio_*= =20 > functions can be added in the system memory address space, it will be=20 > enough for me, and I'll happily drop my patches. Sorry, forgot to CC you. Please check http://thread.gmane.org/gmane.comp.emulators.qemu/218193. Jan --=20 Siemens AG, Corporate Technology, CT RTC ITP SES-DE Corporate Competence Center Embedded Linux