From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46322) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Uu02i-0000Cj-03 for qemu-devel@nongnu.org; Tue, 02 Jul 2013 08:50:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Uu02g-0001gy-4i for qemu-devel@nongnu.org; Tue, 02 Jul 2013 08:50:47 -0400 Message-ID: <51D2C90F.3000106@suse.de> Date: Tue, 02 Jul 2013 14:35:27 +0200 From: Alexander Graf MIME-Version: 1.0 References: <1372108554-1436-1-git-send-email-guerr@julio.in> In-Reply-To: <1372108554-1436-1-git-send-email-guerr@julio.in> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v3] e600 core for MPC86xx processors List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Julio Guerra Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org On 06/24/2013 11:15 PM, Julio Guerra wrote: > MPC86xx processors are based on the e600 core, which is not the case > in qemu where it is based on the 7400 processor. > > This patch creates the e600 core and instantiates the MPC86xx > processors based on it. Therefore, adding the high BATs, the SPRG > 4..7 registers, which are e600-specific [1], and a HW MMU model (as 7400). > This allows to define the MPC8610 processor too. > > Tested with a kernel using the HW TLB misses. > > [1] http://cache.freescale.com/files/32bit/doc/ref_manual/E600CORERM.pdf > > Signed-off-by: Julio Guerra Thanks, applied to ppc-next. Alex