From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44845) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UunaW-0003qF-Ki for qemu-devel@nongnu.org; Thu, 04 Jul 2013 13:45:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UunaO-0004BW-8L for qemu-devel@nongnu.org; Thu, 04 Jul 2013 13:45:00 -0400 Received: from mail-pb0-x230.google.com ([2607:f8b0:400e:c01::230]:34332) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UunaO-0004BP-1i for qemu-devel@nongnu.org; Thu, 04 Jul 2013 13:44:52 -0400 Received: by mail-pb0-f48.google.com with SMTP id ma3so1405154pbc.21 for ; Thu, 04 Jul 2013 10:44:51 -0700 (PDT) Sender: Richard Henderson Message-ID: <51D5B48F.7080905@twiddle.net> Date: Thu, 04 Jul 2013 10:44:47 -0700 From: Richard Henderson MIME-Version: 1.0 References: <1372886968-17497-1-git-send-email-rth@twiddle.net> <1372886968-17497-10-git-send-email-rth@twiddle.net> In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v3 09/14] tcg-arm: Simplify logic in detecting the ARM ISA in use List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: aliguori@us.ibm.com, claudio.fontana@huawei.com, qemu-devel@nongnu.org, afaerber@suse.de On 07/04/2013 04:22 AM, Peter Maydell wrote: > > This change means we now set use_armv5_instructions > for __ARCH_ARCH_5__ and __ARM_ARCH_5E__, which we didn't > before. However one of the things that bool is gating is > whether we use the 'blx' insn, which is ARMv5T and above only. > So this will break v5-but-not-v5T CPUs. Hmm. And thus platform=v5 plus HWCAP_THUMB ought to detect that too, eh? r~