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diff for duplicates of <51ECAF43.80200@linaro.org>

diff --git a/a/1.txt b/N1/1.txt
index 1480c8b..bb83d78 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -91,7 +91,7 @@ Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org>
 > +	p->mapbase_str = ioremap_nocache(res2 ? res2->start :
 > +					 res->start - cfg->channel_offset,
 > +					 res2 ? resource_size(res2) : 2);
-> +	if (p->mapbase_str = NULL) {
+> +	if (p->mapbase_str == NULL) {
 > +		dev_err(&p->pdev->dev, "failed to remap I/O second memory\n");
 > +		goto err1;
 > +	}
@@ -109,7 +109,7 @@ Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org>
 >  
 > -	p->read_control = sh_cmt_read16;
 > -	p->write_control = sh_cmt_write16;
-> +	if (res2 && (resource_size(res2) = 4)) {
+> +	if (res2 && (resource_size(res2) == 4)) {
 > +		/* assume both CMSTR and CMCSR to be 32-bit */
 > +		p->read_control = sh_cmt_read32;
 > +		p->write_control = sh_cmt_write32;
@@ -118,7 +118,7 @@ Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org>
 > +		p->write_control = sh_cmt_write16;
 > +	}
 >  
->  	if (resource_size(res) = 6) {
+>  	if (resource_size(res) == 6) {
 >  		p->width = 16;
 > @@ -752,22 +773,23 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
 >  			      cfg->clocksource_rating);
@@ -152,7 +152,7 @@ Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org>
 
 
 -- 
- <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
+ <http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs
 
 Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
 <http://twitter.com/#!/linaroorg> Twitter |
diff --git a/a/content_digest b/N1/content_digest
index 2243d1e..c0b3c21 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,8 +1,8 @@
  "ref\0cover.1374207810.git.horms+renesas@verge.net.au\0"
  "ref\02792cc6f22031110f6959c02d42d7b6116105a71.1374207810.git.horms+renesas@verge.net.au\0"
- "From\0Daniel Lezcano <daniel.lezcano@linaro.org>\0"
- "Subject\0Re: [PATCH] clocksource: sh_cmt: 32-bit control register support\0"
- "Date\0Mon, 22 Jul 2013 04:04:19 +0000\0"
+ "From\0daniel.lezcano@linaro.org (Daniel Lezcano)\0"
+ "Subject\0[PATCH] clocksource: sh_cmt: 32-bit control register support\0"
+ "Date\0Mon, 22 Jul 2013 06:04:19 +0200\0"
  "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
@@ -99,7 +99,7 @@
  "> +\tp->mapbase_str = ioremap_nocache(res2 ? res2->start :\n"
  "> +\t\t\t\t\t res->start - cfg->channel_offset,\n"
  "> +\t\t\t\t\t res2 ? resource_size(res2) : 2);\n"
- "> +\tif (p->mapbase_str = NULL) {\n"
+ "> +\tif (p->mapbase_str == NULL) {\n"
  "> +\t\tdev_err(&p->pdev->dev, \"failed to remap I/O second memory\\n\");\n"
  "> +\t\tgoto err1;\n"
  "> +\t}\n"
@@ -117,7 +117,7 @@
  ">  \n"
  "> -\tp->read_control = sh_cmt_read16;\n"
  "> -\tp->write_control = sh_cmt_write16;\n"
- "> +\tif (res2 && (resource_size(res2) = 4)) {\n"
+ "> +\tif (res2 && (resource_size(res2) == 4)) {\n"
  "> +\t\t/* assume both CMSTR and CMCSR to be 32-bit */\n"
  "> +\t\tp->read_control = sh_cmt_read32;\n"
  "> +\t\tp->write_control = sh_cmt_write32;\n"
@@ -126,7 +126,7 @@
  "> +\t\tp->write_control = sh_cmt_write16;\n"
  "> +\t}\n"
  ">  \n"
- ">  \tif (resource_size(res) = 6) {\n"
+ ">  \tif (resource_size(res) == 6) {\n"
  ">  \t\tp->width = 16;\n"
  "> @@ -752,22 +773,23 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)\n"
  ">  \t\t\t      cfg->clocksource_rating);\n"
@@ -160,10 +160,10 @@
  "\n"
  "\n"
  "-- \n"
- " <http://www.linaro.org/> Linaro.org \303\242\342\200\235\342\200\232 Open source software for ARM SoCs\n"
+ " <http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs\n"
  "\n"
  "Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |\n"
  "<http://twitter.com/#!/linaroorg> Twitter |\n"
  <http://www.linaro.org/linaro-blog/> Blog
 
-64c2f457ee61fcc0a0200c1ac9e6a15010da0e72112d94309338ed3d38748671
+b2b582c2de9312db6031aab09c1beab5e4ef36b38b2d75fff9004ff0919530a5

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