From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48843) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V1DQx-00021l-N7 for qemu-devel@nongnu.org; Mon, 22 Jul 2013 06:33:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V1DQu-0005cG-U3 for qemu-devel@nongnu.org; Mon, 22 Jul 2013 06:33:39 -0400 Received: from cantor2.suse.de ([195.135.220.15]:45096 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V1DQu-0005c2-Co for qemu-devel@nongnu.org; Mon, 22 Jul 2013 06:33:36 -0400 Message-ID: <51ED0A7B.9030704@suse.de> Date: Mon, 22 Jul 2013 12:33:31 +0200 From: =?ISO-8859-15?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <1374475799-18523-1-git-send-email-owasserm@redhat.com> <51ED0025.7090805@redhat.com> In-Reply-To: <51ED0025.7090805@redhat.com> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 1/2] Fix real mode guest migration List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini Cc: aliguori@us.ibm.com, ehabkost@redhat.com, gleb@redhat.com, mtosatti@redhat.com, qemu-devel@nongnu.org, Orit Wasserman Am 22.07.2013 11:49, schrieb Paolo Bonzini: > Il 22/07/2013 08:49, Orit Wasserman ha scritto: >> Older KVM versions save CS dpl value to an invalid value for real mode= guests >> (0x3). This patch detect this situation when loading CPU state and set= all the >> segments dpl to zero. >> This will allow migration from older KVM on host without unrestricted = guest >> to hosts with restricted guest support. >> For example migration from a Penryn host (with kernel 2.6.32) to >> a Westmere host. >> >> Signed-off-by: Orit Wasserman >> --- >> target-i386/machine.c | 18 ++++++++++++++++++ >> 1 file changed, 18 insertions(+) >> >> diff --git a/target-i386/machine.c b/target-i386/machine.c >> index 3659db9..7e95829 100644 >> --- a/target-i386/machine.c >> +++ b/target-i386/machine.c >> @@ -260,6 +260,24 @@ static int cpu_post_load(void *opaque, int versio= n_id) >> CPUX86State *env =3D &cpu->env; >> int i; >> =20 >> + /* >> + Real mode guest segments register DPL should be zero. >> + Older KVM version were setting it worngly. >> + Fixing it will allow live migration from such host that don't h= ave >> + restricted guest support to an host with unrestricted guest sup= port >> + (otherwise the migration will fail with invalid guest state >> + error). >> + */ >=20 > Coding standard asks for *s on every line. >=20 > As discussed offlist, I would prefer to have this in the kernel since > that's where the bug is. Gleb disagrees. >=20 > We need to find a third person who mediates... Anthony, Eduardo, what > do you think? Having the code here does not look wrong to me, to enforce a consistent state inside QEMU. However I wonder what happens without this patch on Westmere? Might it make sense to sanitize or at least "assert" (whatever the kernel equivalent is ;)) in the ioctl setting X86CPU state to the vCPU that the incoming values will be valid for the host CPU? And optionally in QEMU's KVM code for the reverse direction, cpu_synchronize_state(), to cope with older kernels? Regards, Andreas >> + if (!(env->cr[0] & CR0_PE_MASK) && >> + (env->segs[R_CS].flags >> DESC_DPL_SHIFT & 3) !=3D 0) { >> + env->segs[R_CS].flags &=3D ~(env->segs[R_CS].flags & DESC_DPL= _MASK); >> + env->segs[R_DS].flags &=3D ~(env->segs[R_DS].flags & DESC_DPL= _MASK); >> + env->segs[R_ES].flags &=3D ~(env->segs[R_ES].flags & DESC_DPL= _MASK); >> + env->segs[R_FS].flags &=3D ~(env->segs[R_FS].flags & DESC_DPL= _MASK); >> + env->segs[R_GS].flags &=3D ~(env->segs[R_GS].flags & DESC_DPL= _MASK); >> + env->segs[R_SS].flags &=3D ~(env->segs[R_SS].flags & DESC_DPL= _MASK); >> + } >> + >> /* XXX: restore FPU round state */ >> env->fpstt =3D (env->fpus_vmstate >> 11) & 7; >> env->fpus =3D env->fpus_vmstate & ~0x3800; --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe= rg