diff for duplicates of <51F86A2E.10505@elopez.com.ar> diff --git a/a/1.txt b/N1/1.txt index 396add4..00fa4cb 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -2,7 +2,7 @@ Hi Maxime, Overall this looks good to me, but I have some small comments: -El 30/07/13 11:44, Maxime Ripard escribi?: +El 30/07/13 11:44, Maxime Ripard escribió: > Now that the clock driver has support for the A31 clocks, we can add > them to the DTSI and start using them in the relevant hardware blocks. > @@ -42,7 +42,7 @@ Is osc24M not gatable on A31? > + clock-frequency = <32768>; > + }; > + -> + pll1: pll1 at 01c20000 { +> + pll1: pll1@01c20000 { > + #clock-cells = <0>; > + compatible = "allwinner,sun6i-pll1-clk"; > + reg = <0x01c20000 0x4>; @@ -61,7 +61,7 @@ Is osc24M not gatable on A31? > + clock-frequency = <0>; > + }; > + -> + cpu: cpu at 01c20050 { +> + cpu: cpu@01c20050 { > + #clock-cells = <0>; > + compatible = "allwinner,sun4i-cpu-clk"; > + reg = <0x01c20050 0x4>; @@ -72,21 +72,21 @@ indicate so. A comment to clarify it's not a typo would be good I think. > + }; > + -> + axi: axi at 01c20050 { +> + axi: axi@01c20050 { > + #clock-cells = <0>; > + compatible = "allwinner,sun4i-axi-clk"; > + reg = <0x01c20050 0x4>; > + clocks = <&cpu>; > + }; > + -> + ahb1_mux: ahb1_mux at 01c20054 { +> + ahb1_mux: ahb1_mux@01c20054 { > + #clock-cells = <0>; > + compatible = "allwinner,sun6i-ahb1-mux-clk"; > + reg = <0x01c20054 0x4>; > + clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6>; > + }; > + -> + ahb1: ahb1 at 01c20054 { +> + ahb1: ahb1@01c20054 { > + #clock-cells = <0>; > + compatible = "allwinner,sun4i-ahb-clk"; > + reg = <0x01c20054 0x4>; @@ -97,7 +97,7 @@ Depending on when this lands, I believe these two above could be merged into one with the refactoring introduced on my patchset. > + -> + ahb1_gates: ahb1_gates at 01c20060 { +> + ahb1_gates: ahb1_gates@01c20060 { > + #clock-cells = <1>; > + compatible = "allwinner,sun6i-a31-ahb1-gates-clk"; > + reg = <0x01c20060 0x8>; @@ -118,14 +118,14 @@ into one with the refactoring introduced on my patchset. > + "ahb1_drc0", "ahb1_drc1"; > + }; > + -> + apb1: apb1 at 01c20054 { +> + apb1: apb1@01c20054 { > + #clock-cells = <0>; > + compatible = "allwinner,sun4i-apb0-clk"; > + reg = <0x01c20054 0x4>; > + clocks = <&ahb1>; > + }; > + -> + apb1_gates: apb1_gates at 01c20060 { +> + apb1_gates: apb1_gates@01c20060 { > + #clock-cells = <1>; > + compatible = "allwinner,sun6i-a31-apb1-gates-clk"; > + reg = <0x01c20068 0x4>; @@ -135,14 +135,14 @@ into one with the refactoring introduced on my patchset. > + "apb1_daudio1"; > + }; > + -> + apb2_mux: apb2_mux at 01c20058 { +> + apb2_mux: apb2_mux@01c20058 { > + #clock-cells = <0>; > + compatible = "allwinner,sun4i-apb1-mux-clk"; > + reg = <0x01c20058 0x4>; > + clocks = <&osc32k>, <&osc24M>, <&pll6>, <&pll6>; > + }; > + -> + apb2: apb2 at 01c20058 { +> + apb2: apb2@01c20058 { > + #clock-cells = <0>; > + compatible = "allwinner,sun6i-apb2-div-clk"; > + reg = <0x01c20058 0x4>; @@ -152,7 +152,7 @@ into one with the refactoring introduced on my patchset. Ditto for apb2_mux and apb2. > + -> + apb2_gates: apb2_gates at 01c2006c { +> + apb2_gates: apb2_gates@01c2006c { > + #clock-cells = <1>; > + compatible = "allwinner,sun6i-a31-apb2-gates-clk"; > + reg = <0x01c2006c 0x8>; @@ -164,7 +164,7 @@ Ditto for apb2_mux and apb2. > + }; > }; > -> soc at 01c20000 { +> soc@01c20000 { > @@ -69,7 +186,7 @@ > compatible = "allwinner,sun6i-a31-pinctrl"; > reg = <0x01c20800 0x400>; @@ -182,7 +182,7 @@ Ditto for apb2_mux and apb2. > + clocks = <&osc24M>; > }; > -> wdt1: watchdog at 01c20ca0 { +> wdt1: watchdog@01c20ca0 { > @@ -106,7 +223,7 @@ > interrupts = <0 0 1>; > reg-shift = <2>; diff --git a/a/content_digest b/N1/content_digest index e39310f..516a233 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,16 +1,22 @@ "ref\01375195462-19566-1-git-send-email-maxime.ripard@free-electrons.com\0" "ref\01375195462-19566-5-git-send-email-maxime.ripard@free-electrons.com\0" - "From\0emilio@elopez.com.ar (Emilio L\303\263pez)\0" - "Subject\0[PATCH 4/4] ARM: sun6i: Enable clock support in the DTSI\0" + "From\0Emilio L\303\263pez <emilio@elopez.com.ar>\0" + "Subject\0Re: [PATCH 4/4] ARM: sun6i: Enable clock support in the DTSI\0" "Date\0Tue, 30 Jul 2013 22:36:46 -0300\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Maxime Ripard <maxime.ripard@free-electrons.com>\0" + "Cc\0Mike Turquette <mturquette@linaro.org>" + kevin.z.m.zh@gmail.com + sunny@allwinnertech.com + shuge@allwinnertech.com + linux-arm-kernel@lists.infradead.org + " linux-kernel@vger.kernel.org\0" "\00:1\0" "b\0" "Hi Maxime,\n" "\n" "Overall this looks good to me, but I have some small comments:\n" "\n" - "El 30/07/13 11:44, Maxime Ripard escribi?:\n" + "El 30/07/13 11:44, Maxime Ripard escribi\303\263:\n" "> Now that the clock driver has support for the A31 clocks, we can add\n" "> them to the DTSI and start using them in the relevant hardware blocks.\n" "> \n" @@ -50,7 +56,7 @@ "> +\t\t\tclock-frequency = <32768>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tpll1: pll1 at 01c20000 {\n" + "> +\t\tpll1: pll1@01c20000 {\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"allwinner,sun6i-pll1-clk\";\n" "> +\t\t\treg = <0x01c20000 0x4>;\n" @@ -69,7 +75,7 @@ "> +\t\t\tclock-frequency = <0>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tcpu: cpu at 01c20050 {\n" + "> +\t\tcpu: cpu@01c20050 {\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"allwinner,sun4i-cpu-clk\";\n" "> +\t\t\treg = <0x01c20050 0x4>;\n" @@ -80,21 +86,21 @@ "\n" "> +\t\t};\n" "> +\n" - "> +\t\taxi: axi at 01c20050 {\n" + "> +\t\taxi: axi@01c20050 {\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"allwinner,sun4i-axi-clk\";\n" "> +\t\t\treg = <0x01c20050 0x4>;\n" "> +\t\t\tclocks = <&cpu>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tahb1_mux: ahb1_mux at 01c20054 {\n" + "> +\t\tahb1_mux: ahb1_mux@01c20054 {\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"allwinner,sun6i-ahb1-mux-clk\";\n" "> +\t\t\treg = <0x01c20054 0x4>;\n" "> +\t\t\tclocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tahb1: ahb1 at 01c20054 {\n" + "> +\t\tahb1: ahb1@01c20054 {\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"allwinner,sun4i-ahb-clk\";\n" "> +\t\t\treg = <0x01c20054 0x4>;\n" @@ -105,7 +111,7 @@ "into one with the refactoring introduced on my patchset.\n" "\n" "> +\n" - "> +\t\tahb1_gates: ahb1_gates at 01c20060 {\n" + "> +\t\tahb1_gates: ahb1_gates@01c20060 {\n" "> +\t\t\t#clock-cells = <1>;\n" "> +\t\t\tcompatible = \"allwinner,sun6i-a31-ahb1-gates-clk\";\n" "> +\t\t\treg = <0x01c20060 0x8>;\n" @@ -126,14 +132,14 @@ "> +\t\t\t\t\t\"ahb1_drc0\", \"ahb1_drc1\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tapb1: apb1 at 01c20054 {\n" + "> +\t\tapb1: apb1@01c20054 {\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"allwinner,sun4i-apb0-clk\";\n" "> +\t\t\treg = <0x01c20054 0x4>;\n" "> +\t\t\tclocks = <&ahb1>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tapb1_gates: apb1_gates at 01c20060 {\n" + "> +\t\tapb1_gates: apb1_gates@01c20060 {\n" "> +\t\t\t#clock-cells = <1>;\n" "> +\t\t\tcompatible = \"allwinner,sun6i-a31-apb1-gates-clk\";\n" "> +\t\t\treg = <0x01c20068 0x4>;\n" @@ -143,14 +149,14 @@ "> +\t\t\t\t\t\"apb1_daudio1\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tapb2_mux: apb2_mux at 01c20058 {\n" + "> +\t\tapb2_mux: apb2_mux@01c20058 {\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"allwinner,sun4i-apb1-mux-clk\";\n" "> +\t\t\treg = <0x01c20058 0x4>;\n" "> +\t\t\tclocks = <&osc32k>, <&osc24M>, <&pll6>, <&pll6>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tapb2: apb2 at 01c20058 {\n" + "> +\t\tapb2: apb2@01c20058 {\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"allwinner,sun6i-apb2-div-clk\";\n" "> +\t\t\treg = <0x01c20058 0x4>;\n" @@ -160,7 +166,7 @@ "Ditto for apb2_mux and apb2.\n" "\n" "> +\n" - "> +\t\tapb2_gates: apb2_gates at 01c2006c {\n" + "> +\t\tapb2_gates: apb2_gates@01c2006c {\n" "> +\t\t\t#clock-cells = <1>;\n" "> +\t\t\tcompatible = \"allwinner,sun6i-a31-apb2-gates-clk\";\n" "> +\t\t\treg = <0x01c2006c 0x8>;\n" @@ -172,7 +178,7 @@ "> +\t\t};\n" "> \t};\n" "> \n" - "> \tsoc at 01c20000 {\n" + "> \tsoc@01c20000 {\n" "> @@ -69,7 +186,7 @@\n" "> \t\t\tcompatible = \"allwinner,sun6i-a31-pinctrl\";\n" "> \t\t\treg = <0x01c20800 0x400>;\n" @@ -190,7 +196,7 @@ "> +\t\t\tclocks = <&osc24M>;\n" "> \t\t};\n" "> \n" - "> \t\twdt1: watchdog at 01c20ca0 {\n" + "> \t\twdt1: watchdog@01c20ca0 {\n" "> @@ -106,7 +223,7 @@\n" "> \t\t\tinterrupts = <0 0 1>;\n" "> \t\t\treg-shift = <2>;\n" @@ -251,4 +257,4 @@ "\n" Emilio -c9e2803eb07b2ee827a877347eda7e0073f6a96d64a1b52bce70a49b7ff81b7e +38922eb753993bdc9b2251a33eb7eec381cf9fd84ae5b5930337e78d3960f3db
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