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diff for duplicates of <51FBC4CE.8090009@elopez.com.ar>

diff --git a/a/1.txt b/N1/1.txt
index 9c24050..98dfbd6 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,6 +1,6 @@
 Hi Maxime,
 
-El 23/07/13 19:28, Maxime Ripard escribi?:
+El 23/07/13 19:28, Maxime Ripard escribió:
 > The A10s has only a subset of the A10 gates. Now that the clock driver
 > has support for this gates set, switch to it in the DTSI.
 > 
@@ -8,7 +8,7 @@ El 23/07/13 19:28, Maxime Ripard escribi?:
 
 As I mentioned on the other patch, my board boots, so
 
-Tested-by: Emilio L?pez <emilio@elopez.com.ar>
+Tested-by: Emilio López <emilio@elopez.com.ar>
 
 > ---
 >  arch/arm/boot/dts/sun5i-a10s.dtsi | 36 ++++++++++++++----------------------
@@ -20,7 +20,7 @@ Tested-by: Emilio L?pez <emilio@elopez.com.ar>
 > +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
 > @@ -95,20 +95,16 @@
 >  
->  		ahb_gates: ahb_gates at 01c20060 {
+>  		ahb_gates: ahb_gates@01c20060 {
 >  			#clock-cells = <1>;
 > -			compatible = "allwinner,sun4i-ahb-gates-clk";
 > +			compatible = "allwinner,sun5i-a10s-ahb-gates-clk";
@@ -51,10 +51,10 @@ keeping it in mind.
 > +				"ahb_de_be", "ahb_de_fe", "ahb_iep", "ahb_mali400";
 >  		};
 >  
->  		apb0: apb0 at 01c20054 {
+>  		apb0: apb0@01c20054 {
 > @@ -120,12 +116,11 @@
 >  
->  		apb0_gates: apb0_gates at 01c20068 {
+>  		apb0_gates: apb0_gates@01c20068 {
 >  			#clock-cells = <1>;
 > -			compatible = "allwinner,sun4i-apb0-gates-clk";
 > +			compatible = "allwinner,sun5i-a10s-apb0-gates-clk";
@@ -70,7 +70,7 @@ keeping it in mind.
 >  		/* dummy is pll62 */
 > @@ -145,15 +140,12 @@
 >  
->  		apb1_gates: apb1_gates at 01c2006c {
+>  		apb1_gates: apb1_gates@01c2006c {
 >  			#clock-cells = <1>;
 > -			compatible = "allwinner,sun4i-apb1-gates-clk";
 > +			compatible = "allwinner,sun5i-a10s-apb1-gates-clk";
diff --git a/a/content_digest b/N1/content_digest
index b44c783..3f1c294 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,14 +1,20 @@
  "ref\01374618504-19391-1-git-send-email-maxime.ripard@free-electrons.com\0"
  "ref\01374618504-19391-3-git-send-email-maxime.ripard@free-electrons.com\0"
- "From\0emilio@elopez.com.ar (Emilio L\303\263pez)\0"
- "Subject\0[PATCH 2/2] ARM: sun5i: dt: Use the A10s gates in the DTSI\0"
+ "From\0Emilio L\303\263pez <emilio@elopez.com.ar>\0"
+ "Subject\0Re: [PATCH 2/2] ARM: sun5i: dt: Use the A10s gates in the DTSI\0"
  "Date\0Fri, 02 Aug 2013 11:40:14 -0300\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Maxime Ripard <maxime.ripard@free-electrons.com>\0"
+ "Cc\0Mike Turquette <mturquette@linaro.org>"
+  kevin.z.m.zh@gmail.com
+  sunny@allwinnertech.com
+  shuge@allwinnertech.com
+  linux-arm-kernel@lists.infradead.org
+ " linux-kernel@vger.kernel.org\0"
  "\00:1\0"
  "b\0"
  "Hi Maxime,\n"
  "\n"
- "El 23/07/13 19:28, Maxime Ripard escribi?:\n"
+ "El 23/07/13 19:28, Maxime Ripard escribi\303\263:\n"
  "> The A10s has only a subset of the A10 gates. Now that the clock driver\n"
  "> has support for this gates set, switch to it in the DTSI.\n"
  "> \n"
@@ -16,7 +22,7 @@
  "\n"
  "As I mentioned on the other patch, my board boots, so\n"
  "\n"
- "Tested-by: Emilio L?pez <emilio@elopez.com.ar>\n"
+ "Tested-by: Emilio L\303\263pez <emilio@elopez.com.ar>\n"
  "\n"
  "> ---\n"
  ">  arch/arm/boot/dts/sun5i-a10s.dtsi | 36 ++++++++++++++----------------------\n"
@@ -28,7 +34,7 @@
  "> +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi\n"
  "> @@ -95,20 +95,16 @@\n"
  ">  \n"
- ">  \t\tahb_gates: ahb_gates at 01c20060 {\n"
+ ">  \t\tahb_gates: ahb_gates@01c20060 {\n"
  ">  \t\t\t#clock-cells = <1>;\n"
  "> -\t\t\tcompatible = \"allwinner,sun4i-ahb-gates-clk\";\n"
  "> +\t\t\tcompatible = \"allwinner,sun5i-a10s-ahb-gates-clk\";\n"
@@ -59,10 +65,10 @@
  "> +\t\t\t\t\"ahb_de_be\", \"ahb_de_fe\", \"ahb_iep\", \"ahb_mali400\";\n"
  ">  \t\t};\n"
  ">  \n"
- ">  \t\tapb0: apb0 at 01c20054 {\n"
+ ">  \t\tapb0: apb0@01c20054 {\n"
  "> @@ -120,12 +116,11 @@\n"
  ">  \n"
- ">  \t\tapb0_gates: apb0_gates at 01c20068 {\n"
+ ">  \t\tapb0_gates: apb0_gates@01c20068 {\n"
  ">  \t\t\t#clock-cells = <1>;\n"
  "> -\t\t\tcompatible = \"allwinner,sun4i-apb0-gates-clk\";\n"
  "> +\t\t\tcompatible = \"allwinner,sun5i-a10s-apb0-gates-clk\";\n"
@@ -78,7 +84,7 @@
  ">  \t\t/* dummy is pll62 */\n"
  "> @@ -145,15 +140,12 @@\n"
  ">  \n"
- ">  \t\tapb1_gates: apb1_gates at 01c2006c {\n"
+ ">  \t\tapb1_gates: apb1_gates@01c2006c {\n"
  ">  \t\t\t#clock-cells = <1>;\n"
  "> -\t\t\tcompatible = \"allwinner,sun4i-apb1-gates-clk\";\n"
  "> +\t\t\tcompatible = \"allwinner,sun5i-a10s-apb1-gates-clk\";\n"
@@ -107,4 +113,4 @@
  "\n"
  Emilio
 
-99d9be82a092346594aef9182ad11f77818c6d796f2a90ad59839c3735fb7e01
+347461ac502e2a39787aeef5739b8d918319781a02e2b9dd16ccc62fe3c1b21e

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