Re: arch/x86/kernel/cpu/intel.c needs an update for Haswell?

[Alex Shi <alex.shi@intel.com>]

On 08/01/2013 04:53 PM, Alex Shi wrote:
> From 1322ea9e17ad4d9e49e2d93cfc04805368e28273 Mon Sep 17 00:00:00 2001
> From: Alex Shi <alex.shi@intel.com>
> Date: Thu, 1 Aug 2013 16:30:23 +0800
> Subject: [PATCH 2/2] tlb/tlb_flushall_shift: add haswell tlb_flush_shift
> 
> Tested on i5 4350U with munmap case, https://lkml.org/lkml/2012/5/17/59
> The best performance is tlb_flush_shift = 1.
> The balance point is 256 entries.
> 
> Signed-off-by: Alex Shi <alex.shi@intel.com>


Any comments on this, Peter? :)
> ---
>  arch/x86/kernel/cpu/intel.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
> index 9a4bc51..ac9b83a 100644
> --- a/arch/x86/kernel/cpu/intel.c
> +++ b/arch/x86/kernel/cpu/intel.c
> @@ -627,6 +627,7 @@ static void intel_tlb_flushall_shift_set(struct cpuinfo_x86 *c)
>  		tlb_flushall_shift = 5;
>  		break;
>  	case 0x63a: /* Ivybridge */
> +	case 0x645: /* Haswell */
>  		tlb_flushall_shift = 1;
>  		break;
>  	case 0x63e: /* Ivybridge EP */


-- 
Thanks
    Alex