Re: [PATCH V2 2/3] i2c: mxs: Rework the PIO mode operation

[Alexandre Belloni <alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>]

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On 05/08/2013 12:36, Wolfram Sang wrote:
> On Tue, Jul 30, 2013 at 11:20:36PM +0200, Marek Vasut wrote:
>> Analyze and rework the PIO mode operation. The PIO mode operation
>> was unreliable on MX28, by analyzing the bus with LA, the checks
>> for when data were available or were to be sent were wrong.
>>
>> The PIO WRITE has to be completely reworked as it multiple problems.
>> The MX23 datasheet helped here, see comments in the code for details.
>> The problems boil down to:
>> - RUN bit in CTRL0 must be set after DATA register was written
>> - The PIO transfer must be 4 bytes long tops, otherwise use
>>   clock stretching.
>> Both of these fixes are implemented.
>>
>> The PIO READ operation can only be done for up to four bytes as
>> we are unable to read out the data from the DATA register fast
>> enough.
>>
>> This patch also tries to document the investigation within the
>> code.
>>
>> Signed-off-by: Marek Vasut <marex-ynQEQJNshbs@public.gmane.org>
>
> Thanks. I'd love to see Acked, Reviewed or Tested tags cause I know ppl
> have used these patches. Don't be shy :)
>
>

It was on my todo list until now.

Tested-by: Alexandre Belloni <alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>

- -- 
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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