diff for duplicates of <520DE753.8090601@arm.com> diff --git a/a/1.txt b/N1/1.txt index 4d9ad89..bfed5a9 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -7,44 +7,44 @@ On 16/08/13 05:49, Benjamin Herrenschmidt wrote: >> not match the logical cpu ordering, the parsing logic needs to consider >> that. However, this has resulted in lots of code duplication and in some >> cases even incorrect logic. -> +>=20 > .../... -> ->> +>=20 +>> =20 >> +bool arch_match_cpu_phys_id(int cpu, u64 phys_id) >> +{ ->> + return (int)phys_id == get_hard_smp_processor_id(cpu); +>> +=09return (int)phys_id =3D=3D get_hard_smp_processor_id(cpu); >> +} -> +>=20 > Naming is a bit gross. You might want to make it clearer that > we are talking about CPU IDs in the device-tree here. -> +>=20 Any particular preference to the name or just a note is sufficient. Also unlike PPC, in ARM we don't set hard processor id value based values read from device tree. DT must contain the values matching to the hardware ID registers. >> +static bool __of_find_n_match_cpu_property(struct device_node *cpun, ->> + const char *prop_name, int cpu, unsigned int *thread) +>> +=09=09=09const char *prop_name, int cpu, unsigned int *thread) >> +{ ->> + const __be32 *cell; ->> + int ac, prop_len, tid; ->> + u64 hwid; +>> +=09const __be32 *cell; +>> +=09int ac, prop_len, tid; +>> +=09u64 hwid; >> + ->> + ac = of_n_addr_cells(cpun); ->> + cell = of_get_property(cpun, prop_name, &prop_len); ->> + if (!cell) ->> + return false; ->> + prop_len /= sizeof(*cell); ->> + for (tid = 0; tid < prop_len; tid++) { ->> + hwid = of_read_number(cell, ac); ->> + if (arch_match_cpu_phys_id(cpu, hwid)) { ->> + if (thread) ->> + *thread = tid; ->> + return true; ->> + } -> -> Missing: cell += ac; +>> +=09ac =3D of_n_addr_cells(cpun); +>> +=09cell =3D of_get_property(cpun, prop_name, &prop_len); +>> +=09if (!cell) +>> +=09=09return false; +>> +=09prop_len /=3D sizeof(*cell); +>> +=09for (tid =3D 0; tid < prop_len; tid++) { +>> +=09=09hwid =3D of_read_number(cell, ac); +>> +=09=09if (arch_match_cpu_phys_id(cpu, hwid)) { +>> +=09=09=09if (thread) +>> +=09=09=09=09*thread =3D tid; +>> +=09=09=09return true; +>> +=09=09} +>=20 +> Missing: cell +=3D ac; Ah, missed it while refactoring, will fix it. Thanks Regards, diff --git a/a/content_digest b/N1/content_digest index 72e1e8e..35693d7 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -6,19 +6,19 @@ "Subject\0Re: [RFC PATCH 3/4] powerpc: refactor of_get_cpu_node to support other architectures\0" "Date\0Fri, 16 Aug 2013 09:48:19 +0100\0" "To\0Benjamin Herrenschmidt <benh@kernel.crashing.org>\0" - "Cc\0Sudeep KarkadaNagesha <Sudeep.KarkadaNagesha@arm.com>" - linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org> - linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> - linux-pm@vger.kernel.org <linux-pm@vger.kernel.org> + "Cc\0Jonas Bonn <jonas@southpole.se>" devicetree@vger.kernel.org <devicetree@vger.kernel.org> + Michal Simek <monstr@monstr.eu> + linux-pm@vger.kernel.org <linux-pm@vger.kernel.org> + Sudeep KarkadaNagesha <Sudeep.KarkadaNagesha@arm.com> microblaze-uclinux@itee.uq.edu.au <microblaze-uclinux@itee.uq.edu.au> linux@openrisc.net <linux@openrisc.net> - linuxppc-dev@lists.ozlabs.org <linuxppc-dev@lists.ozlabs.org> - Jonas Bonn <jonas@southpole.se> - Michal Simek <monstr@monstr.eu> + linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> + rob.herring@calxeda.com <rob.herring@calxeda.com> Rafael J. Wysocki <rjw@sisk.pl> grant.likely@linaro.org <grant.likely@linaro.org> - " rob.herring@calxeda.com <rob.herring@calxeda.com>\0" + linuxppc-dev@lists.ozlabs.org <linuxppc-dev@lists.ozlabs.org> + " linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>\0" "\00:1\0" "b\0" "On 16/08/13 05:49, Benjamin Herrenschmidt wrote:\n" @@ -30,47 +30,47 @@ ">> not match the logical cpu ordering, the parsing logic needs to consider\n" ">> that. However, this has resulted in lots of code duplication and in some\n" ">> cases even incorrect logic.\n" - "> \n" + ">=20\n" "> .../...\n" - "> \n" - ">> \n" + ">=20\n" + ">> =20\n" ">> +bool arch_match_cpu_phys_id(int cpu, u64 phys_id)\n" ">> +{\n" - ">> +\treturn (int)phys_id == get_hard_smp_processor_id(cpu);\n" + ">> +=09return (int)phys_id =3D=3D get_hard_smp_processor_id(cpu);\n" ">> +}\n" - "> \n" + ">=20\n" "> Naming is a bit gross. You might want to make it clearer that\n" "> we are talking about CPU IDs in the device-tree here.\n" - "> \n" + ">=20\n" "Any particular preference to the name or just a note is sufficient.\n" "Also unlike PPC, in ARM we don't set hard processor id value based\n" "values read from device tree. DT must contain the values matching to the\n" "hardware ID registers.\n" "\n" ">> +static bool __of_find_n_match_cpu_property(struct device_node *cpun,\n" - ">> +\t\t\tconst char *prop_name, int cpu, unsigned int *thread)\n" + ">> +=09=09=09const char *prop_name, int cpu, unsigned int *thread)\n" ">> +{\n" - ">> +\tconst __be32 *cell;\n" - ">> +\tint ac, prop_len, tid;\n" - ">> +\tu64 hwid;\n" + ">> +=09const __be32 *cell;\n" + ">> +=09int ac, prop_len, tid;\n" + ">> +=09u64 hwid;\n" ">> +\n" - ">> +\tac = of_n_addr_cells(cpun);\n" - ">> +\tcell = of_get_property(cpun, prop_name, &prop_len);\n" - ">> +\tif (!cell)\n" - ">> +\t\treturn false;\n" - ">> +\tprop_len /= sizeof(*cell);\n" - ">> +\tfor (tid = 0; tid < prop_len; tid++) {\n" - ">> +\t\thwid = of_read_number(cell, ac);\n" - ">> +\t\tif (arch_match_cpu_phys_id(cpu, hwid)) {\n" - ">> +\t\t\tif (thread)\n" - ">> +\t\t\t\t*thread = tid;\n" - ">> +\t\t\treturn true;\n" - ">> +\t\t}\n" - "> \n" - "> Missing: cell += ac;\n" + ">> +=09ac =3D of_n_addr_cells(cpun);\n" + ">> +=09cell =3D of_get_property(cpun, prop_name, &prop_len);\n" + ">> +=09if (!cell)\n" + ">> +=09=09return false;\n" + ">> +=09prop_len /=3D sizeof(*cell);\n" + ">> +=09for (tid =3D 0; tid < prop_len; tid++) {\n" + ">> +=09=09hwid =3D of_read_number(cell, ac);\n" + ">> +=09=09if (arch_match_cpu_phys_id(cpu, hwid)) {\n" + ">> +=09=09=09if (thread)\n" + ">> +=09=09=09=09*thread =3D tid;\n" + ">> +=09=09=09return true;\n" + ">> +=09=09}\n" + ">=20\n" + "> Missing: cell +=3D ac;\n" "Ah, missed it while refactoring, will fix it. Thanks\n" "\n" "Regards,\n" Sudeep -114ea181d5b4042410cda0e56c51019e333aaac835dcbf69d7cdd87066f571b2 +5739eca3ab84a00bd9c5cc7d283d5733b79cd19ce29809b0ba280a6acfd8dcad
diff --git a/a/content_digest b/N2/content_digest index 72e1e8e..88f9879 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -2,23 +2,10 @@ "ref\01376586580-5409-1-git-send-email-Sudeep.KarkadaNagesha@arm.com\0" "ref\01376586580-5409-4-git-send-email-Sudeep.KarkadaNagesha@arm.com\0" "ref\01376628563.4255.137.camel@pasglop\0" - "From\0Sudeep KarkadaNagesha <Sudeep.KarkadaNagesha@arm.com>\0" - "Subject\0Re: [RFC PATCH 3/4] powerpc: refactor of_get_cpu_node to support other architectures\0" + "From\0Sudeep.KarkadaNagesha@arm.com (Sudeep KarkadaNagesha)\0" + "Subject\0[RFC PATCH 3/4] powerpc: refactor of_get_cpu_node to support other architectures\0" "Date\0Fri, 16 Aug 2013 09:48:19 +0100\0" - "To\0Benjamin Herrenschmidt <benh@kernel.crashing.org>\0" - "Cc\0Sudeep KarkadaNagesha <Sudeep.KarkadaNagesha@arm.com>" - linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org> - linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> - linux-pm@vger.kernel.org <linux-pm@vger.kernel.org> - devicetree@vger.kernel.org <devicetree@vger.kernel.org> - microblaze-uclinux@itee.uq.edu.au <microblaze-uclinux@itee.uq.edu.au> - linux@openrisc.net <linux@openrisc.net> - linuxppc-dev@lists.ozlabs.org <linuxppc-dev@lists.ozlabs.org> - Jonas Bonn <jonas@southpole.se> - Michal Simek <monstr@monstr.eu> - Rafael J. Wysocki <rjw@sisk.pl> - grant.likely@linaro.org <grant.likely@linaro.org> - " rob.herring@calxeda.com <rob.herring@calxeda.com>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On 16/08/13 05:49, Benjamin Herrenschmidt wrote:\n" @@ -73,4 +60,4 @@ "Regards,\n" Sudeep -114ea181d5b4042410cda0e56c51019e333aaac835dcbf69d7cdd87066f571b2 +fa19ac1517789ea83cd1cf05aa34e9cc4646642772e0100e230111d22f765ff8
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