From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41942) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VBPBc-0007gH-Fg for qemu-devel@nongnu.org; Mon, 19 Aug 2013 09:08:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VBPBQ-0007qD-2T for qemu-devel@nongnu.org; Mon, 19 Aug 2013 09:07:56 -0400 Message-ID: <5212189C.2090707@suse.de> Date: Mon, 19 Aug 2013 15:07:40 +0200 From: =?ISO-8859-15?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <1376915356-31011-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com> <1376915356-31011-4-git-send-email-aneesh.kumar@linux.vnet.ibm.com> In-Reply-To: <1376915356-31011-4-git-send-email-aneesh.kumar@linux.vnet.ibm.com> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 3/3] target-ppc: Fix page table lookup with kvm enabled List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Aneesh Kumar K.V" Cc: Alexey Kardashevskiy , qemu-ppc@nongnu.org, Alexander Graf , qemu-devel@nongnu.org Am 19.08.2013 14:29, schrieb Aneesh Kumar K.V: > From: "Aneesh Kumar K.V" >=20 > With kvm enabled, we store the hash page table information in the hyper= visor. > Use ioctl to read the htab contents. Without this we get the below erro= r when > trying to read the guest address >=20 > (gdb) x/10 do_fork > 0xc000000000098660 : Cannot access memory at address 0xc000= 000000098660 > (gdb) >=20 > Signed-off-by: Aneesh Kumar K.V > --- > target-ppc/kvm.c | 45 +++++++++++++++++++++++++++++++++++++++++= ++++ > target-ppc/kvm_ppc.h | 3 ++- > target-ppc/mmu-hash64.c | 25 ++++++++++++++++--------- > 3 files changed, 63 insertions(+), 10 deletions(-) >=20 > diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c > index 5d4e613..63a9c0e 100644 > --- a/target-ppc/kvm.c > +++ b/target-ppc/kvm.c > @@ -1885,3 +1885,48 @@ int kvm_arch_on_sigbus(int code, void *addr) > void kvm_arch_init_irq_routing(KVMState *s) > { > } > + > +int kvmppc_hash64_load_hpte(CPUPPCState *env, __u64 index, uint64_t in QEMU please, same in the header. Could you replace CPUPPCState *env with the new PowerPCCPU *cpu as argument, please? I don't see it actually being used though... > + target_ulong *hpte0, target_ulong *hpte1) > +{ > + int htab_fd; > + struct kvm_get_htab_fd ghf; > + struct kvm_get_htab_buf { > + struct kvm_get_htab_header header; > + /* > + * Older kernel required one extra byte. > + */ > + unsigned long hpte[3]; > + } hpte_buf; > + > + *hpte0 =3D 0; > + *hpte1 =3D 0; > + if (!cap_htab_fd) { > + return 0; > + } > + /* > + * At this point we are only interested in reading only bolted ent= ries > + */ > + ghf.flags =3D KVM_GET_HTAB_BOLTED_ONLY; > + ghf.start_index =3D index; > + htab_fd =3D kvm_vm_ioctl(kvm_state, KVM_PPC_GET_HTAB_FD, &ghf); > + if (htab_fd < 0) { > + return htab_fd; > + } > + > + if (read(htab_fd, &hpte_buf, sizeof(hpte_buf)) < 0) { > + goto out; > + } > + /* > + * We only requested for one entry, So we should get only 1 > + * valid entry at the same index > + */ > + if (hpte_buf.header.n_valid !=3D 1 || hpte_buf.header.index !=3D i= ndex) { > + goto out; > + } > + *hpte0 =3D hpte_buf.hpte[0]; > + *hpte1 =3D hpte_buf.hpte[1]; > +out: > + close(htab_fd); > + return 0; Double space :) > +} > diff --git a/target-ppc/kvm_ppc.h b/target-ppc/kvm_ppc.h > index 4ae7bf2..51c8952 100644 > --- a/target-ppc/kvm_ppc.h > +++ b/target-ppc/kvm_ppc.h > @@ -42,7 +42,8 @@ int kvmppc_get_htab_fd(bool write); > int kvmppc_save_htab(QEMUFile *f, int fd, size_t bufsize, int64_t max_= ns); > int kvmppc_load_htab_chunk(QEMUFile *f, int fd, uint32_t index, > uint16_t n_valid, uint16_t n_invalid); > - > +int kvmppc_hash64_load_hpte(CPUPPCState *env, __u64 index, > + target_ulong *hpte0, target_ulong *hpte1); > #else > =20 > static inline uint32_t kvmppc_get_tbfreq(void) > diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c > index 67fc1b5..239f268 100644 > --- a/target-ppc/mmu-hash64.c > +++ b/target-ppc/mmu-hash64.c > @@ -302,17 +302,26 @@ static int ppc_hash64_amr_prot(CPUPPCState *env, = ppc_hash_pte64_t pte) > return prot; > } > =20 > -static hwaddr ppc_hash64_pteg_search(CPUPPCState *env, hwaddr pteg_off= , > +static hwaddr ppc_hash64_pteg_search(CPUPPCState *env, hwaddr hash, > bool secondary, target_ulong ptem= , > ppc_hash_pte64_t *pte) > { > - hwaddr pte_offset =3D pteg_off; > + __u64 index; This is not KVM code, so definitely uint64_t for cross-platform support. > + hwaddr pte_offset; > target_ulong pte0, pte1; > int i; > =20 > + pte_offset =3D (hash * HASH_PTEG_SIZE_64) & env->htab_mask;; > + index =3D (hash * HPTES_PER_GROUP) & env->htab_mask; > + > for (i =3D 0; i < HPTES_PER_GROUP; i++) { > - pte0 =3D ppc_hash64_load_hpte0(env, pte_offset); > - pte1 =3D ppc_hash64_load_hpte1(env, pte_offset); > + if (kvm_enabled()) { > + index +=3D i; > + kvmppc_hash64_load_hpte(env, index, &pte0, &pte1); ppc_env_get_cpu(env) would get you the PowerPCCPU* here, if needed. Regards, Andreas > + } else { > + pte0 =3D ppc_hash64_load_hpte0(env, pte_offset); > + pte1 =3D ppc_hash64_load_hpte1(env, pte_offset); > + } > =20 > if ((pte0 & HPTE64_V_VALID) > && (secondary =3D=3D !!(pte0 & HPTE64_V_SECONDARY)) > @@ -332,7 +341,7 @@ static hwaddr ppc_hash64_htab_lookup(CPUPPCState *e= nv, > ppc_slb_t *slb, target_ulong eadd= r, > ppc_hash_pte64_t *pte) > { > - hwaddr pteg_off, pte_offset; > + hwaddr pte_offset; > hwaddr hash; > uint64_t vsid, epnshift, epnmask, epn, ptem; > =20 > @@ -367,8 +376,7 @@ static hwaddr ppc_hash64_htab_lookup(CPUPPCState *e= nv, > " vsid=3D" TARGET_FMT_lx " ptem=3D" TARGET_FMT_lx > " hash=3D" TARGET_FMT_plx "\n", > env->htab_base, env->htab_mask, vsid, ptem, hash); > - pteg_off =3D (hash * HASH_PTEG_SIZE_64) & env->htab_mask; > - pte_offset =3D ppc_hash64_pteg_search(env, pteg_off, 0, ptem, pte)= ; > + pte_offset =3D ppc_hash64_pteg_search(env, hash, 0, ptem, pte); > =20 > if (pte_offset =3D=3D -1) { > /* Secondary PTEG lookup */ > @@ -377,8 +385,7 @@ static hwaddr ppc_hash64_htab_lookup(CPUPPCState *e= nv, > " hash=3D" TARGET_FMT_plx "\n", env->htab_base, > env->htab_mask, vsid, ptem, ~hash); > =20 > - pteg_off =3D (~hash * HASH_PTEG_SIZE_64) & env->htab_mask; > - pte_offset =3D ppc_hash64_pteg_search(env, pteg_off, 1, ptem, = pte); > + pte_offset =3D ppc_hash64_pteg_search(env, ~hash, 1, ptem, pte= ); > } > =20 > return pte_offset; >=20 --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe= rg