From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andre Przywara Subject: Re: [PATCH] PL011: fix reverse logic for interrupt mask register Date: Tue, 20 Aug 2013 18:51:58 +0200 Message-ID: <52139EAE.8020707@linaro.org> References: <1376406755-23703-1-git-send-email-andre.przywara@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1376406755-23703-1-git-send-email-andre.przywara@linaro.org> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Ian.Campbell@citrix.com Cc: julien.grall@linaro.org, xen-devel@lists.xen.org, patches@linaro.org, stefano.stabellini@eu.citrix.com List-Id: xen-devel@lists.xenproject.org On 08/13/2013 05:12 PM, Andre Przywara wrote: Ian, what about this one? This is a real showstopper on Midway. Thanks, Andre. > The PL011 IMSC register description is somehow fuzzy in the > documentation; by comparing it with the Linux implementation one can > see that the logic is actually reversed to Xen's implementation: > A "0" in field means interrupt disabled, a "1" enables it. > Therefore we enabled all interrupts instead of disabling them in the > beginning and later on masked the wrong interrupts. > Unclear how this worked on the Versatile Express, but this fix is > needed to get Calxeda Midway running (and works on VExpress, too). > > Signed-off-by: Andre Przywara > --- > xen/drivers/char/pl011.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/xen/drivers/char/pl011.c b/xen/drivers/char/pl011.c > index 05d034f..8e90520 100644 > --- a/xen/drivers/char/pl011.c > +++ b/xen/drivers/char/pl011.c > @@ -87,7 +87,7 @@ static void __init pl011_init_preirq(struct serial_port *port) > unsigned int divisor; > > /* No interrupts, please. */ > - pl011_write(uart, IMSC, ALLI); > + pl011_write(uart, IMSC, 0); > > /* Definitely no DMA */ > pl011_write(uart, DMACR, 0x0); > @@ -115,7 +115,7 @@ static void __init pl011_init_preirq(struct serial_port *port) > pl011_write(uart, RSR, 0); > > /* Mask and clear the interrupts */ > - pl011_write(uart, IMSC, ALLI); > + pl011_write(uart, IMSC, 0); > pl011_write(uart, ICR, ALLI); > > /* Enable the UART for RX and TX; no flow ctrl */ > @@ -140,7 +140,7 @@ static void __init pl011_init_postirq(struct serial_port *port) > pl011_write(uart, ICR, OEI|BEI|PEI|FEI); > > /* Unmask interrupts */ > - pl011_write(uart, IMSC, RTI|DSRMI|DCDMI|CTSMI|RIMI); > + pl011_write(uart, IMSC, OEI|BEI|PEI|FEI|TXI|RXI); > } > > static void pl011_suspend(struct serial_port *port) >