Re: [Qemu-devel] [PATCH 1/2] hpet: entitle more irq pins for hpet

[Paolo Bonzini <pbonzini@redhat.com>]

Il 25/08/2013 04:16, Liu Ping Fan ha scritto:
> On PC, IRQ2/8 can be reserved for hpet timer 0/1. And pin 16~23 of
> ioapic can be dynamically assigned to hpet as guest chooses.
> 
> Signed-off-by: Liu Ping Fan <pingfank@linux.vnet.ibm.com>
> ---
>  hw/timer/hpet.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
> index 648b383..cd95d39 100644
> --- a/hw/timer/hpet.c
> +++ b/hw/timer/hpet.c
> @@ -41,6 +41,8 @@
>  #endif
>  
>  #define HPET_MSI_SUPPORT        0
> +/* Hpet can use non-legacy IRQ16~23, and an IRQ2 ,IRQ8 */
> +#define HPET_TN_INT_CAP (0xff0104ULL << 32)
>  
>  #define TYPE_HPET "hpet"
>  #define HPET(obj) OBJECT_CHECK(HPETState, (obj), TYPE_HPET)
> @@ -653,8 +655,8 @@ static void hpet_reset(DeviceState *d)
>          if (s->flags & (1 << HPET_MSI_SUPPORT)) {
>              timer->config |= HPET_TN_FSB_CAP;
>          }
> -        /* advertise availability of ioapic inti2 */
> -        timer->config |=  0x00000004ULL << 32;
> +        /* advertise availability of ioapic int */
> +        timer->config |=  HPET_TN_INT_CAP;
>          timer->period = 0ULL;
>          timer->wrap_flag = 0;
>      }
> 

These high 32-bits of timer->config need to be a property of the HPET
devices, so that the old value (4) is used when running with old machine
types.  Also, this patch must be the second, not the first, otherwise
you have a commit with btoken polarity IRQs.

Paolo