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From: Julien Grall <julien.grall@linaro.org>
To: Ian Campbell <ian.campbell@citrix.com>
Cc: xen-devel@lists.xen.org, patches@linaro.org,
	Andre Przywara <andre.przywara@linaro.org>,
	stefano.stabellini@eu.citrix.com
Subject: Re: [PATCH] PL011: fix reverse logic for interrupt mask register
Date: Mon, 26 Aug 2013 16:55:28 +0100	[thread overview]
Message-ID: <521B7A70.300@linaro.org> (raw)
In-Reply-To: <1377156187.31937.87.camel@hastur.hellion.org.uk>

On 08/22/2013 08:23 AM, Ian Campbell wrote:
> On Wed, 2013-08-21 at 17:11 +0100, Julien Grall wrote:
>> On 08/13/2013 04:12 PM, Andre Przywara wrote:
>>> The PL011 IMSC register description is somehow fuzzy in the
>>> documentation; by comparing it with the Linux implementation one can
>>> see that the logic is actually reversed to Xen's implementation:
>>> A "0" in field means interrupt disabled, a "1" enables it.
>>> Therefore we enabled all interrupts instead of disabling them in the
>>> beginning and later on masked the wrong interrupts.
>>> Unclear how this worked on the Versatile Express, but this fix is
>>> needed to get Calxeda Midway running (and works on VExpress, too).
>>
>> On my Versatile Express, the keyboard is unusable with this patch.
>> Xen receives random keys and sometimes nothing is printed on the serial
>> port.
>>
>> By reverting this patch on my tree, I'm able to use correctly the serial
>> port.
> 
> :-/ Andre did say this patch worked on vexpress for him.
> 
> I'm pretty certain Andre's patch is correct in its own right. But the
> fact that it worked before does seem to imply that there are other
> issues with the pl011 driver, it's likely that this change has just
> exposed a latent one.
> 
> Could this be related somehow to the baud rate setting change? I
> wouldn't have expected so but "random keys" and nothingness could be a
> symptom of incorrect baud too.
> 
> Does anyone have time to look into this?
> 

If RTI interrupt are enabled (see small patch below), the UART works perfectly
on the versatile express.

The PL011 documentation says the bit is used to mask/unmask receive interrupt
timeout. I don't understand why this interrupt is useful and the documentation
doesn't help me...

====================================================================================
diff --git a/xen/drivers/char/pl011.c b/xen/drivers/char/pl011.c
index 0e1eb64..e4bd702 100644
--- a/xen/drivers/char/pl011.c
+++ b/xen/drivers/char/pl011.c
@@ -140,7 +140,7 @@ static void __init pl011_init_postirq(struct serial_port *port)
     pl011_write(uart, ICR, OEI|BEI|PEI|FEI);
 
     /* Unmask interrupts */
-    pl011_write(uart, IMSC, OEI|BEI|PEI|FEI|TXI|RXI);
+    pl011_write(uart, IMSC, RTI|OEI|BEI|PEI|FEI|TXI|RXI);
 }
 
 static void pl011_suspend(struct serial_port *port)
======================================================================================

-- 
Julien Grall

  reply	other threads:[~2013-08-26 15:55 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-08-13 15:12 [PATCH] PL011: fix reverse logic for interrupt mask register Andre Przywara
2013-08-20 16:51 ` Andre Przywara
2013-08-21 10:04 ` Ian Campbell
2013-08-21 13:58   ` Andre Przywara
2013-08-21 14:27     ` Ian Campbell
2013-08-21 14:34     ` Ian Campbell
2013-08-21 16:11 ` Julien Grall
2013-08-22  7:23   ` Ian Campbell
2013-08-26 15:55     ` Julien Grall [this message]
2013-08-27 10:37       ` Ian Campbell
2013-08-27 10:45         ` Ian Campbell
2013-08-27 10:58           ` Julien Grall
2013-08-27 11:00             ` Ian Campbell
  -- strict thread matches above, loose matches on Subject: below --
2013-08-20 17:27 Ian Campbell

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