From: Stefano Babic <sbabic@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH V2] spi: mxs: Configure chipselect after block reset
Date: Mon, 26 Aug 2013 18:04:35 +0200 [thread overview]
Message-ID: <521B7C93.4070707@denx.de> (raw)
In-Reply-To: <1377531923-5137-1-git-send-email-marex@denx.de>
On 26/08/2013 17:45, Marek Vasut wrote:
> The chipselect must be written into the CTRL0 register after the SSP
> block is reset, otherwise the block will always use ChipSelect #0.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Fabio Estevam <fabio.estevam@freescale.com>
> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
> Cc: Otavio Salvador <otavio@ossystems.com.br>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
> drivers/spi/mxs_spi.c | 12 +++---------
> 1 file changed, 3 insertions(+), 9 deletions(-)
>
> V2: Clean up a warning that "ssp_regs" are not used
>
> diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
> index 3cf7142..2b9f395 100644
> --- a/drivers/spi/mxs_spi.c
> +++ b/drivers/spi/mxs_spi.c
> @@ -56,8 +56,6 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
> unsigned int max_hz, unsigned int mode)
> {
> struct mxs_spi_slave *mxs_slave;
> - struct mxs_ssp_regs *ssp_regs;
> - int reg;
>
> if (!spi_cs_is_valid(bus, cs)) {
> printf("mxs_spi: invalid bus %d / chip select %d\n", bus, cs);
> @@ -74,13 +72,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
> mxs_slave->max_khz = max_hz / 1000;
> mxs_slave->mode = mode;
> mxs_slave->regs = mxs_ssp_regs_by_bus(bus);
> - ssp_regs = mxs_slave->regs;
>
> - reg = readl(&ssp_regs->hw_ssp_ctrl0);
> - reg &= ~(MXS_SSP_CHIPSELECT_MASK);
> - reg |= cs << MXS_SSP_CHIPSELECT_SHIFT;
> -
> - writel(reg, &ssp_regs->hw_ssp_ctrl0);
> return &mxs_slave->slave;
>
> err_init:
> @@ -102,7 +94,9 @@ int spi_claim_bus(struct spi_slave *slave)
>
> mxs_reset_block(&ssp_regs->hw_ssp_ctrl0_reg);
>
> - writel(SSP_CTRL0_BUS_WIDTH_ONE_BIT, &ssp_regs->hw_ssp_ctrl0);
> + writel((slave->cs << MXS_SSP_CHIPSELECT_SHIFT) |
> + SSP_CTRL0_BUS_WIDTH_ONE_BIT,
> + &ssp_regs->hw_ssp_ctrl0);
>
> reg = SSP_CTRL1_SSP_MODE_SPI | SSP_CTRL1_WORD_LENGTH_EIGHT_BITS;
> reg |= (mxs_slave->mode & SPI_CPOL) ? SSP_CTRL1_POLARITY : 0;
>
Acked-by: Stefano Babic <sbabic@denx.de>
Best regards,
Stefano Babic
--
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next prev parent reply other threads:[~2013-08-26 16:04 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-26 15:45 [U-Boot] [PATCH V2] spi: mxs: Configure chipselect after block reset Marek Vasut
2013-08-26 16:04 ` Stefano Babic [this message]
2013-08-27 9:05 ` Marek Vasut
2013-08-27 9:08 ` Jagan Teki
2013-08-27 9:21 ` Marek Vasut
2013-08-27 9:28 ` Jagan Teki
2013-08-27 9:34 ` Marek Vasut
2013-08-27 14:12 ` Jagan Teki
2013-08-27 9:10 ` Stefano Babic
2013-08-27 9:13 ` Jagan Teki
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