From mboxrd@z Thu Jan 1 00:00:00 1970 From: Suravee Suthikulanit Subject: Re: [PATCH] AMD IOMMU: also allocate IRTEs for HPET MSI Date: Tue, 27 Aug 2013 14:06:54 -0500 Message-ID: <521CF8CE.8040307@amd.com> References: <521B804C02000078000EE70F@nat28.tlf.novell.com> <521BFF07.7060406@amd.com> <521C665302000078000EE9C1@nat28.tlf.novell.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2506196292439631051==" Return-path: Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1VEObZ-0003ag-Nc for xen-devel@lists.xenproject.org; Tue, 27 Aug 2013 19:07:06 +0000 In-Reply-To: <521C665302000078000EE9C1@nat28.tlf.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich Cc: Sander Eikelenboom , Jacob Shin , xen-devel List-Id: xen-devel@lists.xenproject.org --===============2506196292439631051== Content-Type: multipart/alternative; boundary="------------080004090604010303080809" --------------080004090604010303080809 Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit On 8/27/2013 1:41 AM, Jan Beulich wrote: >>>> On 27.08.13 at 03:21, Suravee Suthikulpanit wrote: >> I have been trying to test out this patch. Somehow, I could not get Xen >> boot option to exercise the code path. What boot configuration are you >> using to test this? > I don't have a system suitable for testing this; Sander did. The main > requirement apart from having an IOMMU is to also have a HPET > with at least on MSI-capable channel. Otherwise code won't get > here. The normal flow is > > hpet_broadcast_init() -> hpet_fsb_cap_lookup() -> hpet_assign_irq() > -> hpet_setup_msi_irq() -> iommu_setup_hpet_msi() > > Jan Ah,ok.. I found out thatthisonly applies on the family10h system with IOMMUdue to the check in arch/x86/time.c:_disable_pit_irq "if (!boot_cpu_has(X86_FEATURE_ARAT))" and the condition in arch/x86/cpu/amd.c:_init_amd() /* * Family 0x12 and above processors have APIC timer * running in deep C states. */ if (c->x86 > 0x11) set_bit(X86_FEATURE_ARAT, c->x86_capability); Jan, doyou think you could also add the comment that this only applicable on family10h? Acked-by: Suravee Suthikulpanit Thank you, Suravee. --------------080004090604010303080809 Content-Type: text/html; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit
On 8/27/2013 1:41 AM, Jan Beulich wrote:
On 27.08.13 at 03:21, Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> wrote:

I have been trying to test out this patch.  Somehow, I could not get Xen 
boot option to exercise the code path.  What boot configuration are you 
using to test this?

I don't have a system suitable for testing this; Sander did. The main
requirement apart from having an IOMMU is to also have a HPET
with at least on MSI-capable channel. Otherwise code won't get
here. The normal flow is 

hpet_broadcast_init() -> hpet_fsb_cap_lookup() -> hpet_assign_irq()
-> hpet_setup_msi_irq() -> iommu_setup_hpet_msi()

Jan
Ah, ok.. I found out that this only applies on the family10h system with IOMMU due to the check in arch/x86/time.c:_disable_pit_irq

     "if (!boot_cpu_has(X86_FEATURE_ARAT))"

and the condition in arch/x86/cpu/amd.c:_init_amd()

    /*
     * Family 0x12 and above processors have APIC timer
     * running in deep C states.
     */
    if (c->x86 > 0x11)
        set_bit(X86_FEATURE_ARAT, c->x86_capability);

Jan, do you think you could also add the comment that this only applicable on family10h?

Acked-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>

Thank you,

Suravee.
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