From: Minkyu Kang <mk7.kang@samsung.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/6 V2] Sound: WM8994: Support I2S0 channel
Date: Wed, 28 Aug 2013 10:56:44 +0900 [thread overview]
Message-ID: <521D58DC.2000802@samsung.com> (raw)
In-Reply-To: <1375598683-3174-2-git-send-email-krishna.md@samsung.com>
Dear Dani Krishna Mohan,
On 04/08/13 15:44, Dani Krishna Mohan wrote:
> This patch modifies the WM8994 codec to support I2S0 channel
> in codec slave mode
>
> Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
> ---
> changes in V2:
> - None
> drivers/sound/sound.c | 2 +-
> drivers/sound/wm8994.c | 95 +++++++++++++++-----------------------
> drivers/sound/wm8994_registers.h | 77 ++++++++++++++++--------------
> 3 files changed, 81 insertions(+), 93 deletions(-)
>
I think, we can support both of AIF1 and AIF2.
Why don't you add AIF1 features instead of replacing.
> diff --git a/drivers/sound/sound.c b/drivers/sound/sound.c
> index 6fcc75d..47879a4 100644
> --- a/drivers/sound/sound.c
> +++ b/drivers/sound/sound.c
> @@ -130,7 +130,7 @@ static int codec_init(const void *blob, struct i2stx_info *pi2s_tx)
> #endif
> if (!strcmp(codectype, "wm8994")) {
> /* Check the codec type and initialise the same */
> - ret = wm8994_init(blob, WM8994_AIF2,
> + ret = wm8994_init(blob, WM8994_AIF1,
> pi2s_tx->samplingrate,
> (pi2s_tx->samplingrate * (pi2s_tx->rfs)),
> pi2s_tx->bitspersample, pi2s_tx->channels);
> diff --git a/drivers/sound/wm8994.c b/drivers/sound/wm8994.c
> index 37e354c..57c8f8d 100644
> --- a/drivers/sound/wm8994.c
> +++ b/drivers/sound/wm8994.c
> @@ -477,9 +477,9 @@ static int configure_aif_clock(struct wm8994_priv *wm8994, int aif)
> reg1);
>
> ret |= wm8994_update_bits(WM8994_CLOCKING_1,
> - WM8994_SYSCLK_SRC | WM8994_AIF2DSPCLK_ENA_MASK |
> + WM8994_SYSCLK_SRC | WM8994_AIF1DSPCLK_ENA_MASK |
> WM8994_SYSDSPCLK_ENA_MASK, WM8994_SYSCLK_SRC |
> - WM8994_AIF2DSPCLK_ENA | WM8994_SYSDSPCLK_ENA);
> + WM8994_AIF1DSPCLK_ENA | WM8994_SYSDSPCLK_ENA);
>
> if (ret < 0) {
> debug("%s: codec register access error\n", __func__);
> @@ -536,7 +536,7 @@ static int wm8994_set_sysclk(struct wm8994_priv *wm8994, int aif_id,
> break;
> if (i == ARRAY_SIZE(opclk_divs)) {
> debug("%s frequency divisor not found\n",
> - __func__);
> + __func__);
> return -1;
> }
> ret = wm8994_update_bits(WM8994_CLOCKING_2,
> @@ -565,28 +565,17 @@ static int wm8994_set_sysclk(struct wm8994_priv *wm8994, int aif_id,
> }
>
> /*
> - * Initializes Volume for AIF2 to HP path
> + * Initializes Volume for AIF1 to HP path
> *
> * @returns -1 for error and 0 Success.
> *
> */
> -static int wm8994_init_volume_aif2_dac1(void)
> +static int wm8994_init_volume_aif1_dac1(void)
> {
> - int ret;
> -
> - /* Unmute AIF2DAC */
> - ret = wm8994_update_bits(WM8994_AIF2_DAC_FILTERS_1,
> - WM8994_AIF2DAC_MUTE_MASK, 0);
> -
> -
> - ret |= wm8994_update_bits(WM8994_AIF2_DAC_LEFT_VOLUME,
> - WM8994_AIF2DAC_VU_MASK | WM8994_AIF2DACL_VOL_MASK,
> - WM8994_AIF2DAC_VU | 0xff);
> -
> - ret |= wm8994_update_bits(WM8994_AIF2_DAC_RIGHT_VOLUME,
> - WM8994_AIF2DAC_VU_MASK | WM8994_AIF2DACR_VOL_MASK,
> - WM8994_AIF2DAC_VU | 0xff);
> + int ret = 0;
>
> + /* unmute AIF1DAC1 */
> + ret |= wm8994_i2c_write(WM8994_AIF1_DAC_FILTERS_1, 0x0000);
>
> ret |= wm8994_update_bits(WM8994_DAC1_LEFT_VOLUME,
> WM8994_DAC1_VU_MASK | WM8994_DAC1L_VOL_MASK |
> @@ -661,12 +650,19 @@ static int wm8994_device_init(struct wm8994_priv *wm8994)
> ret |= wm8994_update_bits(WM8994_POWER_MANAGEMENT_1,
> WM8994_HPOUT1R_ENA_MASK, WM8994_HPOUT1R_ENA);
>
> - /* Power enable for AIF2 and DAC1 */
> - ret |= wm8994_update_bits(WM8994_POWER_MANAGEMENT_5,
> - WM8994_AIF2DACL_ENA_MASK | WM8994_AIF2DACR_ENA_MASK |
> - WM8994_DAC1L_ENA_MASK | WM8994_DAC1R_ENA_MASK,
> - WM8994_AIF2DACL_ENA | WM8994_AIF2DACR_ENA | WM8994_DAC1L_ENA |
> - WM8994_DAC1R_ENA);
> +
> + ret |= wm8994_i2c_write(WM8994_POWER_MANAGEMENT_2, WM8994_TSHUT_ENA
> + | WM8994_MIXINL_ENA | WM8994_MIXINR_ENA
> + | WM8994_IN2L_ENA | WM8994_IN2R_ENA);
> +
> + ret |= wm8994_i2c_write(WM8994_POWER_MANAGEMENT_4, WM8994_ADCL_ENA
> + | WM8994_ADCR_ENA | WM8994_AIF1ADC1R_ENA
> + | WM8994_AIF1ADC1L_ENA);
> +
> + /* Power enable for AIF1 and DAC1 */
> + ret |= wm8994_i2c_write(WM8994_POWER_MANAGEMENT_5, WM8994_AIF1DACL_ENA
> + | WM8994_AIF1DACR_ENA | WM8994_DAC1L_ENA
> + | WM8994_DAC1R_ENA);
>
> /* Head Phone Initialisation */
> ret |= wm8994_update_bits(WM8994_ANALOGUE_HP_1,
> @@ -695,35 +691,20 @@ static int wm8994_device_init(struct wm8994_priv *wm8994)
> ret |= wm8994_update_bits(WM8994_OUTPUT_MIXER_2,
> WM8994_DAC1R_TO_HPOUT1R_MASK, WM8994_DAC1R_TO_HPOUT1R);
>
> - /* Routing AIF2 to DAC1 */
> - ret |= wm8994_update_bits(WM8994_DAC1_LEFT_MIXER_ROUTING,
> - WM8994_AIF2DACL_TO_DAC1L_MASK,
> - WM8994_AIF2DACL_TO_DAC1L);
> -
> - ret |= wm8994_update_bits(WM8994_DAC1_RIGHT_MIXER_ROUTING,
> - WM8994_AIF2DACR_TO_DAC1R_MASK,
> - WM8994_AIF2DACR_TO_DAC1R);
> -
> - /* GPIO Settings for AIF2 */
> - /* B CLK */
> - ret |= wm8994_update_bits(WM8994_GPIO_3, WM8994_GPIO_DIR_MASK |
> - WM8994_GPIO_FUNCTION_MASK ,
> - WM8994_GPIO_DIR_OUTPUT |
> - WM8994_GPIO_FUNCTION_I2S_CLK);
> -
> - /* LR CLK */
> - ret |= wm8994_update_bits(WM8994_GPIO_4, WM8994_GPIO_DIR_MASK |
> - WM8994_GPIO_FUNCTION_MASK,
> - WM8994_GPIO_DIR_OUTPUT |
> - WM8994_GPIO_FUNCTION_I2S_CLK);
> -
> - /* DATA */
> - ret |= wm8994_update_bits(WM8994_GPIO_5, WM8994_GPIO_DIR_MASK |
> - WM8994_GPIO_FUNCTION_MASK,
> - WM8994_GPIO_DIR_OUTPUT |
> - WM8994_GPIO_FUNCTION_I2S_CLK);
> -
> - ret |= wm8994_init_volume_aif2_dac1();
> + /* Routing AIF1 to DAC1 */
> + ret |= wm8994_i2c_write(WM8994_DAC1_LEFT_MIXER_ROUTING,
> + WM8994_AIF1DAC1L_TO_DAC1L);
> +
> + ret |= wm8994_i2c_write(WM8994_DAC1_RIGHT_MIXER_ROUTING,
> + WM8994_AIF1DAC1R_TO_DAC1R);
> +
> + /* GPIO Settings for AIF1 */
> +
> + ret |= wm8994_i2c_write(WM8994_GPIO_1, WM8994_GPIO_DIR_OUTPUT
> + | WM8994_GPIO_FUNCTION_I2S_CLK
> + | WM8994_GPIO_INPUT_DEBOUNCE);
> +
> + ret |= wm8994_init_volume_aif1_dac1();
> if (ret < 0)
> goto err;
>
> @@ -813,11 +794,11 @@ int wm8994_init(const void *blob, enum en_audio_interface aif_id,
> g_wm8994_i2c_dev_addr = pcodec_info->i2c_dev_addr;
> wm8994_i2c_init(pcodec_info->i2c_bus);
>
> - if (pcodec_info->codec_type == CODEC_WM_8994)
> + if (pcodec_info->codec_type == CODEC_WM_8994) {
> g_wm8994_info.type = WM8994;
> - else {
> + } else {
> debug("%s: Codec id [%d] not defined\n", __func__,
> - pcodec_info->codec_type);
> + pcodec_info->codec_type);
> return -1;
unrelated change.
> }
>
> diff --git a/drivers/sound/wm8994_registers.h b/drivers/sound/wm8994_registers.h
> index 1e987c2..debb658 100644
> --- a/drivers/sound/wm8994_registers.h
> +++ b/drivers/sound/wm8994_registers.h
> @@ -13,6 +13,7 @@
> #define WM8994_SOFTWARE_RESET 0x00
> #define WM8994_POWER_MANAGEMENT_1 0x01
> #define WM8994_POWER_MANAGEMENT_2 0x02
> +#define WM8994_POWER_MANAGEMENT_4 0x04
> #define WM8994_POWER_MANAGEMENT_5 0x05
> #define WM8994_LEFT_OUTPUT_VOLUME 0x1C
> #define WM8994_RIGHT_OUTPUT_VOLUME 0x1D
> @@ -38,6 +39,9 @@
> #define WM8994_AIF2_CONTROL_2 0x311
> #define WM8994_AIF2_MASTER_SLAVE 0x312
> #define WM8994_AIF2_BCLK 0x313
> +#define WM8994_AIF1_DAC_LEFT_VOLUME 0x402
> +#define WM8994_AIF1_DAC_RIGHT_VOLUME 0x403
> +#define WM8994_AIF1_DAC_FILTERS_1 0x420
> #define WM8994_AIF2_DAC_LEFT_VOLUME 0x502
> #define WM8994_AIF2_DAC_RIGHT_VOLUME 0x503
> #define WM8994_AIF2_DAC_FILTERS_1 0x520
> @@ -45,6 +49,8 @@
> #define WM8994_DAC1_RIGHT_MIXER_ROUTING 0x602
> #define WM8994_DAC1_LEFT_VOLUME 0x610
> #define WM8994_DAC1_RIGHT_VOLUME 0x611
> +#define WM8994_OVERSAMPLING 0x620
> +#define WM8994_GPIO_1 0x700
please use tab.
> #define WM8994_GPIO_3 0x702
> #define WM8994_GPIO_4 0x703
> #define WM8994_GPIO_5 0x704
> @@ -75,6 +81,8 @@
> #define WM8994_BIAS_ENA 0x0001
> /* BIAS_ENA */
> #define WM8994_BIAS_ENA_MASK 0x0001
> +#define WM8994_BIAS_ENA_SHIFT 0
> +#define WM8994_BIAS_ENA_WIDTH 1
>
> /*
> * R2 (0x02) - Power Management (2)
> @@ -82,21 +90,35 @@
> /* OPCLK_ENA */
> #define WM8994_OPCLK_ENA 0x0800
>
> +#define WM8994_TSHUT_ENA 0x4000
> +#define WM8994_MIXINL_ENA 0x0200
> +#define WM8994_MIXINR_ENA 0x0100
> +#define WM8994_IN2L_ENA 0x0080
> +#define WM8994_IN2R_ENA 0x0020
please use tab.
> +
> +/*
> + * R5 (0x04) - Power Management (4)
> + */
> +#define WM8994_ADCL_ENA 0x0001
> +#define WM8994_ADCR_ENA 0x0002
> +#define WM8994_AIF1ADC1R_ENA 0x0100
> +#define WM8994_AIF1ADC1L_ENA 0x0200
> +
> /*
> * R5 (0x05) - Power Management (5)
> */
> -/* AIF2DACL_ENA */
> -#define WM8994_AIF2DACL_ENA 0x2000
> -#define WM8994_AIF2DACL_ENA_MASK 0x2000
> -/* AIF2DACR_ENA */
> -#define WM8994_AIF2DACR_ENA 0x1000
> -#define WM8994_AIF2DACR_ENA_MASK 0x1000
> /* DAC1L_ENA */
> #define WM8994_DAC1L_ENA 0x0002
> #define WM8994_DAC1L_ENA_MASK 0x0002
> /* DAC1R_ENA */
> #define WM8994_DAC1R_ENA 0x0001
> #define WM8994_DAC1R_ENA_MASK 0x0001
> +/* AIF1DACL_ENA */
> +#define WM8994_AIF1DACL_ENA 0x0200
> +#define WM8994_AIF1DACL_ENA_MASK 0x0200
> +/* AIF1DACR_ENA */
> +#define WM8994_AIF1DACR_ENA 0x0100
> +#define WM8994_AIF1DACR_ENA_MASK 0x0100
>
> /*
> * R45 (0x2D) - Output Mixer (1)
> @@ -170,14 +192,14 @@
> /*
> * R520 (0x208) - Clocking (1)
> */
> -/* AIF2DSPCLK_ENA */
> -#define WM8994_AIF2DSPCLK_ENA 0x0004
> -#define WM8994_AIF2DSPCLK_ENA_MASK 0x0004
> +/* AIF1DSPCLK_ENA */
> +#define WM8994_AIF1DSPCLK_ENA 0x0008
> +#define WM8994_AIF1DSPCLK_ENA_MASK 0x0008
please use tab.
> /* SYSDSPCLK_ENA */
> #define WM8994_SYSDSPCLK_ENA 0x0002
> #define WM8994_SYSDSPCLK_ENA_MASK 0x0002
> /* SYSCLK_SRC */
> -#define WM8994_SYSCLK_SRC 0x0001
> +#define WM8994_SYSCLK_SRC 0x0000
>
> /*
> * R521 (0x209) - Clocking (2)
> @@ -228,27 +250,6 @@
> #define WM8994_AIF1_BCLK_DIV_SHIFT 4
>
> /*
> - * R1282 (0x502) - AIF2 DAC Left Volume
> - */
> -/* AIF2DAC_VU */
> -#define WM8994_AIF2DAC_VU 0x0100
> -#define WM8994_AIF2DAC_VU_MASK 0x0100
> -/* AIF2DACL_VOL - [7:0] */
> -#define WM8994_AIF2DACL_VOL_MASK 0x00FF
> -
> -/*
> - * R1283 (0x503) - AIF2 DAC Right Volume
> - */
> -/* AIF2DACR_VOL - [7:0] */
> -#define WM8994_AIF2DACR_VOL_MASK 0x00FF
> -
> -/*
> - * R1312 (0x520) - AIF2 DAC Filters (1)
> - */
> -/* AIF2DAC_MUTE */
> -#define WM8994_AIF2DAC_MUTE_MASK 0x0200
> -
> -/*
> * R1537 (0x601) - DAC1 Left Mixer Routing
> */
> /* AIF2DACL_TO_DAC1L */
> @@ -262,6 +263,11 @@
> #define WM8994_AIF2DACR_TO_DAC1R 0x0004
> #define WM8994_AIF2DACR_TO_DAC1R_MASK 0x0004
>
> +/* AIF1DAC1L_TO_DAC1L */
> +#define WM8994_AIF1DAC1L_TO_DAC1L 0x0001
please use tab.
> +
> +/* AIF1DAC1R_TO_DAC1R */
> +#define WM8994_AIF1DAC1R_TO_DAC1R 0x0001
please use tab.
> /*
> * R1552 (0x610) - DAC1 Left Volume
> */
> @@ -285,11 +291,12 @@
> * GPIO
> */
> /* OUTPUT PIN */
> -#define WM8994_GPIO_DIR_OUTPUT 0x8000
> +#define WM8994_GPIO_DIR_OUTPUT 0x8000
please use tab.
> /* GPIO PIN MASK */
> -#define WM8994_GPIO_DIR_MASK 0xFFE0
> +#define WM8994_GPIO_DIR_MASK 0xFFE0
> /* I2S CLK */
> -#define WM8994_GPIO_FUNCTION_I2S_CLK 0x0000
> +#define WM8994_GPIO_FUNCTION_I2S_CLK 0x0001
> +#define WM8994_GPIO_INPUT_DEBOUNCE 0x0100
> /* GPn FN */
> -#define WM8994_GPIO_FUNCTION_MASK 0x001F
> +#define WM8994_GPIO_FUNCTION_MASK 0x001F
please use tab.
> #endif
>
Thanks,
Minkyu Kang.
next prev parent reply other threads:[~2013-08-28 1:56 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-04 6:44 [U-Boot] [PATCH 0/6 V2] EXYNOS: I2S: Enable I2S0 channel Dani Krishna Mohan
2013-08-04 6:44 ` [U-Boot] [PATCH 1/6 V2] Sound: WM8994: Support " Dani Krishna Mohan
2013-08-28 1:56 ` Minkyu Kang [this message]
2013-08-04 6:44 ` [U-Boot] [PATCH 2/6 V2] DTS: Addition of I2S0 channel and replacing I2S1 Dani Krishna Mohan
2013-08-04 6:44 ` [U-Boot] [PATCH 3/6 V2] ARM: Change from I2S1 to I2S0 for audio on SMDK5250 Dani Krishna Mohan
2013-08-28 2:34 ` Minkyu Kang
2013-08-04 6:44 ` [U-Boot] [PATCH 4/6 V2] Sound: I2S: Replacing I2S1 with I2S0 channel Dani Krishna Mohan
2013-08-28 2:36 ` Minkyu Kang
2013-08-04 6:44 ` [U-Boot] [PATCH 5/6 V2] DTS: Addition of GPIO chipselect for MAX98095 Dani Krishna Mohan
2013-08-04 6:44 ` [U-Boot] [PATCH 6/6 V2] Sound: MAX98095: Support I2S0 channel Dani Krishna Mohan
2013-08-28 2:39 ` Minkyu Kang
2013-08-19 8:27 ` [U-Boot] [PATCH 0/6 V2] EXYNOS: I2S: Enable " Rajeshwari Birje
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