From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Cooper Subject: Re: [PATCH] x86/boot: Use mov to cr0 in preference to lmsw Date: Wed, 28 Aug 2013 11:33:15 +0100 Message-ID: <521DD1EB.7050502@citrix.com> References: <1377684357-14991-1-git-send-email-andrew.cooper3@citrix.com> <521DEB8602000078000EF07E@nat28.tlf.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1VEd3v-0003LV-GE for xen-devel@lists.xenproject.org; Wed, 28 Aug 2013 10:33:19 +0000 In-Reply-To: <521DEB8602000078000EF07E@nat28.tlf.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich Cc: xen-devel , Keir Fraser List-Id: xen-devel@lists.xenproject.org On 28/08/13 11:22, Jan Beulich wrote: >>>> On 28.08.13 at 12:05, Andrew Cooper wrote: >> lmsw is for compability for 286 processors only, and any more modern >> processors are recomended to use mov to cr0. Xen has never been capable of >> booting on a 286, given its multiboot entry. > I don't really mind this part (albeit it results in growth of the > trampoline code), but ... > >> Furthermore, this avoids needless playing with the CD, NW and AM bits. >> These do get explicitly chosen slightly later on boot. > ... I clearly don't understand what you're referring to here: These > bits don't get modified by LMSW. > > Jan > D'oh - yes. I intended the MP, EM and TS bits. (I scanned the wrong direction through the written description of the cr0 bits). The I shall send v2 which corrects the description - it is a bit too misleading as it currently stands.