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From: Paolo Bonzini <pbonzini@redhat.com>
To: liu ping fan <qemulist@gmail.com>
Cc: "Anthony Liguori" <anthony@codemonkey.ws>,
	"Jan Kiszka" <jan.kiszka@siemens.com>,
	qemu-devel@nongnu.org, "Stefan Hajnoczi" <stefanha@redhat.com>,
	"Andreas Färber" <afaerber@suse.de>
Subject: Re: [Qemu-devel] [PATCH v4 0/3] bugs fix for hpet
Date: Wed, 04 Sep 2013 09:03:30 +0200	[thread overview]
Message-ID: <5226DB42.1080000@redhat.com> (raw)
In-Reply-To: <CAJnKYQ=OJM_0USB476ovHb1fxKZMQDkxf=-ki2vLdTpf5M-O4Q@mail.gmail.com>

Il 04/09/2013 07:29, liu ping fan ha scritto:
> On Tue, Sep 3, 2013 at 7:17 PM, Paolo Bonzini <pbonzini@redhat.com> wrote:
>> Il 02/09/2013 09:06, Liu Ping Fan ha scritto:
>>> note: I rebase it onto Stefan's net-next tree, since pc-1.7 has already been defined there.
>>>
>>> v4:
>>>   use standard compat property to set hpet's interrupt compatibility
>>>
>>> v3:
>>>   change hpet interrupt capablity on board's demand
>>>
>>>
>>> Liu Ping Fan (3):
>>>   hpet: inverse polarity when pin above ISA_NUM_IRQS
>>>   hpet: entitle more irq pins for hpet
>>>   pc-1.6: add compatibility for hpet intcap on pc-*-1.6
>>>
>>>  hw/timer/hpet.c      | 27 +++++++++++++++++++++++----
>>>  include/hw/i386/pc.h |  5 +++++
>>>  2 files changed, 28 insertions(+), 4 deletions(-)
>>>
>>
>> Looks good.  But I have one question; should this be changed for PIIX
>> too, or should the 1.7 PIIX machine keep the old behavior?  (I have no
>> idea).
>>
> Your suspicion is right.  When going through PIIX4 spec, I found that
> the chipset was without ioapic integrated. So there is divergence for
> the compatibility of pc-piix-* and pc-q35-*.  Can I code the hpet's
> compatiblity in pc-piix-1.7 to resolve this?

You could do something like what people suggested earlier in the review.
 Change sysbus_try_create_simple to
qdev_try_create/sysbus_mmio_map/qdev_init in pc_basic_device_init (this
is one patch, going before v4 3/3).  Then add a new argument to
pc_basic_device_init, and set the intcap property if the new argument is
nonzero (another patch, going before v4 3/3; where the new argument is
always 0).  Finally, piix can pass 4 for the new argument, while q35 can
keep passing 0 (squashed in v4 3/3).

In other words, PIIX hardcodes the value 4, while Q35 uses compat
properties.

I still have a doubt.  Can the PIIX HPET use interrupt 8?  If so, this
won't work and we have to go back to the drawing board.  But if it can
use interrupt 2 only, it will be okay.

Paolo

  reply	other threads:[~2013-09-04  7:03 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-09-02  7:06 [Qemu-devel] [PATCH v4 0/3] bugs fix for hpet Liu Ping Fan
2013-09-02  7:06 ` [Qemu-devel] [PATCH v4 1/3] hpet: inverse polarity when pin above ISA_NUM_IRQS Liu Ping Fan
2013-09-02  7:06 ` [Qemu-devel] [PATCH v4 2/3] hpet: entitle more irq pins for hpet Liu Ping Fan
2013-09-02  7:06 ` [Qemu-devel] [PATCH v4 3/3] pc-1.6: add compatibility for hpet intcap on pc-*-1.6 Liu Ping Fan
2013-09-02 11:41 ` [Qemu-devel] [PATCH v4 0/3] bugs fix for hpet Stefan Hajnoczi
2013-09-03 11:17 ` Paolo Bonzini
2013-09-04  5:29   ` liu ping fan
2013-09-04  7:03     ` Paolo Bonzini [this message]
2013-09-04  8:20       ` liu ping fan

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