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From: "Andreas Bießmann" <andreas.devel@googlemail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] NAND write error with HW ECC on OMAP3
Date: Thu, 05 Sep 2013 10:42:54 +0200	[thread overview]
Message-ID: <5228440E.6070404@gmail.com> (raw)
In-Reply-To: <CAK8F28mKmJBR1ob_EWHmHqaNtxt2RL5QTPG_0FjQgy=gQTf06w@mail.gmail.com>

Dear Ash Charles,

On 09/04/2013 08:00 PM, Ash Charles wrote:
> On Wed, Sep 4, 2013 at 1:54 AM, Andreas Bie?mann
> <andreas.devel@googlemail.com> wrote:
>> I can't confirm your complaints. Here it works (at least on tricorder,
>> which utilizes BCH for U-Boot section in SPL):
> Hi Andreas,
> 
> Thanks for your response---this was very helpful.  When I boot my
> board using the tricorder board file, it flashes nand correctly.
> Likewise, I moved over some of the NAND configuration from
> include/configs/tricorder.h to include/configs/omap3_overo.h and,
> after a little rearranging to enlarge SPL, it also flashed NAND
> correctly.
> 
> So...any guesses what it is about setting these variables that gets
> NAND flashing to work properly?
> 
> +#define CONFIG_NAND_OMAP_BCH8
> +#define CONFIG_BCH
> -#define CONFIG_SYS_NAND_ECCPOS         {2, 3, 4, 5, 6, 7, 8, 9,\
> -                                               10, 11, 12, 13}
> +#define CONFIG_SYS_NAND_ECCPOS         {12, 13, 14, 15, 16, 17, 18, 19, 20, \
> +                        21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,\
> +                        34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46,\
> +                        47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59,\
> +                        60, 61, 62, 63}
> -#define CONFIG_SYS_NAND_ECCBYTES       3
> +#define CONFIG_SYS_NAND_ECCBYTES       13

these settings are for BCH8! The original settings you replaced are for
so called 'SW hamming' (1 bit ecc with special OOB layout for omap3,
differs from 1 bit ecc mapping used by the omap3 HW calculation in ROM
code).

If you need higher ECC schemes for your NAND, you should update your
setup (u-boot + SPL _and_ linux) to use some BCH codec. BCH4 calculation
seems buggy on some omap3, therefore I used BCH8 here.
Obviously is it a required step, since even SLC need 4 bit ecc nowadays,
some allow just 1 bit for the first sector if only a few erasures occur.

Best regards

Andreas Bie?mann

      parent reply	other threads:[~2013-09-05  8:42 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-09-03 19:34 [U-Boot] NAND write error with HW ECC on OMAP3 Ash Charles
2013-09-04  7:35 ` Andreas Bießmann
2013-09-04  8:54   ` Andreas Bießmann
2013-09-04 18:00     ` Ash Charles
2013-09-04 23:02       ` Ash Charles
2013-09-05  8:57         ` Andreas Bießmann
2013-09-07  1:57           ` Ash Charles
2013-09-05  8:42       ` Andreas Bießmann [this message]

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