From mboxrd@z Thu Jan  1 00:00:00 1970
From: Andrew Cooper <andrew.cooper3@citrix.com>
Subject: Re: [PATCH 1/3] Nested VMX: Check VMX capability before
 read VMX related MSRs.
Date: Thu, 5 Sep 2013 10:49:08 +0100
Message-ID: <52285394.7020201@citrix.com>
References: <1378349840-20186-1-git-send-email-yang.z.zhang@intel.com>
	<1378349840-20186-2-git-send-email-yang.z.zhang@intel.com>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
Return-path: <xen-devel-bounces@lists.xen.org>
In-Reply-To: <1378349840-20186-2-git-send-email-yang.z.zhang@intel.com>
List-Unsubscribe: <http://lists.xen.org/cgi-bin/mailman/options/xen-devel>,
	<mailto:xen-devel-request@lists.xen.org?subject=unsubscribe>
List-Post: <mailto:xen-devel@lists.xen.org>
List-Help: <mailto:xen-devel-request@lists.xen.org?subject=help>
List-Subscribe: <http://lists.xen.org/cgi-bin/mailman/listinfo/xen-devel>,
	<mailto:xen-devel-request@lists.xen.org?subject=subscribe>
Sender: xen-devel-bounces@lists.xen.org
Errors-To: xen-devel-bounces@lists.xen.org
To: Yang Zhang <yang.z.zhang@intel.com>
Cc: xen-devel@lists.xensource.com, eddie.dong@intel.com, JBeulich@suse.com, jun.nakajima@intel.com
List-Id: xen-devel@lists.xenproject.org

On 05/09/13 03:57, Yang Zhang wrote:
> From: Yang Zhang <yang.z.zhang@Intel.com>
>
> VMX MSRs only available when the CPU support the VMX feature. In addition,
> VMX_TRUE* MSRs only available when bitt 55 of VMX_BASIC MSR is set.

As you already have to respin the patch, "bit" rather than "bitt"

~Andrew

>
> Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com>
> ---
>  xen/arch/x86/hvm/vmx/vvmx.c |   18 ++++++++++++++++++
>  1 files changed, 18 insertions(+), 0 deletions(-)
>
> diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c
> index cecc72f..2e0b7f7 100644
> --- a/xen/arch/x86/hvm/vmx/vvmx.c
> +++ b/xen/arch/x86/hvm/vmx/vvmx.c
> @@ -1820,6 +1820,24 @@ int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content)
>      if ( !nestedhvm_enabled(v->domain) )
>          return 0;
>  
> +    /*
> +     * VMX capablitys MSRs available only when guest
> +     * support VMX.
> +     */
> +    hvm_cpuid(0x1, &eax, &ebx, &ecx, &edx);
> +    if ( !(ecx & cpufeat_mask(X86_FEATURE_VMXE)) ) 
> +        return 0;
> +
> +    /* 
> +     * Those MSRs available only when bit 55 of
> +     * MSR_IA32_VMX_BASIC is set.
> +     */
> +    rdmsrl(MSR_IA32_VMX_BASIC, data);
> +    if ( msr >= MSR_IA32_VMX_TRUE_PINBASED_CTLS &&
> +            msr <= MSR_IA32_VMX_TRUE_ENTRY_CTLS &&
> +            !(data & VMX_BASIC_DEFAULT1_ZERO) )
> +        return 0;
> +
>      rdmsrl(msr, host_data);
>  
>      /*