Re: parisc debian kernel - missing modules for C8000 - linux-image-3.10-2-parisc64-smp

[Helge Deller <deller@gmx.de>]

On 09/05/2013 01:58 AM, John David Anglin wrote:
> Should have just given link:=20
> http://developer.amd.com/resources/documentation-articles/developer-g=
uides-manuals/
> It is listed near bottom as "R5xx Family 3D Programming Guide".

I found this "older" one:
http://www.x.org/docs/AMD/R5xx_Acceleration_v1.1.pdf

Maybe section 4.5 (Chips et Coherency Issues) is relevant too: ?
The Rage128 product revealed a weakness in some motherboard chipsets in=
 that there is no mechanism to guarantee
that data written by the CPU to memory is actually in a readable state =
before the Graphics Controller receives an
update to its copy of the Write Pointer. In an effort to alleviate this=
 problem, we=E2=80=9Fve introduced a mechanism into the
Graphics Controller that will delay the actual write to the Write Point=
er for some programmable amount of time, in
order to give the chipset time to flush its internal write buffers to m=
emory.
There are two register fields that control this mechanism: PRE_WRITE_TI=
MER and PRE_WRITE_LIMIT.[...]

In the radeon DRM codebase I didn't found anyone using/setting those re=
gisters.
Maybe PA-RISC has some problem here?...

Just a thought.

Helge
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