Re: [PATCH v3 1/3] Nested VMX: Check VMX capability before read VMX related MSRs.

[Andrew Cooper <andrew.cooper3@citrix.com>]

On 11/09/13 03:52, Yang Zhang wrote:
> From: Yang Zhang <yang.z.zhang@Intel.com>
>
> VMX MSRs only available when the CPU support the VMX feature. In addition,
> VMX_TRUE* MSRs only available when bit 55 of VMX_BASIC MSR is set.
>
> Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com>
> ---
>  xen/arch/x86/hvm/vmx/vmcs.c |    3 ++-
>  xen/arch/x86/hvm/vmx/vvmx.c |   22 ++++++++++++++++++++++
>  2 files changed, 24 insertions(+), 1 deletions(-)
>
> diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c
> index 31347bb..f8d2a9d 100644
> --- a/xen/arch/x86/hvm/vmx/vmcs.c
> +++ b/xen/arch/x86/hvm/vmx/vmcs.c
> @@ -78,6 +78,7 @@ static DEFINE_PER_CPU(struct list_head, active_vmcs_list);
>  static DEFINE_PER_CPU(bool_t, vmxon);
>  
>  static u32 vmcs_revision_id __read_mostly;
> +u32 vmx_basic_msr_low, vmx_basic_msr_high;
>  
>  static void __init vmx_display_features(void)
>  {
> @@ -133,7 +134,7 @@ static bool_t cap_check(const char *name, u32 expected, u32 saw)
>  
>  static int vmx_init_vmcs_config(void)
>  {
> -    u32 vmx_basic_msr_low, vmx_basic_msr_high, min, opt;
> +    u32 min, opt;
>      u32 _vmx_pin_based_exec_control;
>      u32 _vmx_cpu_based_exec_control;
>      u32 _vmx_secondary_exec_control = 0;
> diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c
> index cecc72f..554d5c0 100644
> --- a/xen/arch/x86/hvm/vmx/vvmx.c
> +++ b/xen/arch/x86/hvm/vmx/vvmx.c
> @@ -31,6 +31,7 @@
>  static DEFINE_PER_CPU(u64 *, vvmcs_buf);
>  
>  static void nvmx_purge_vvmcs(struct vcpu *v);
> +extern u32 vmx_basic_msr_high;
>  
>  #define VMCS_BUF_SIZE 100
>  
> @@ -1814,12 +1815,33 @@ int nvmx_handle_invvpid(struct cpu_user_regs *regs)
>  int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content)
>  {
>      struct vcpu *v = current;
> +    unsigned int eax, ebx, ecx, edx;
>      u64 data = 0, host_data = 0;
>      int r = 1;
>  
>      if ( !nestedhvm_enabled(v->domain) )
>          return 0;
>  
> +    /* VMX capablity MSRs are available only when guest supports VMX. */
> +    hvm_cpuid(0x1, &eax, &ebx, &ecx, &edx);
> +    if ( !(ecx & cpufeat_mask(X86_FEATURE_VMXE)) )
> +        return 0;
> +
> +    /*
> +     * Those MSRs are available only when bit 55 of
> +     * MSR_IA32_VMX_BASIC is set.
> +     */
> +    switch (msr) {
> +    case MSR_IA32_VMX_TRUE_PINBASED_CTLS:
> +    case MSR_IA32_VMX_TRUE_PROCBASED_CTLS:
> +    case MSR_IA32_VMX_TRUE_EXIT_CTLS:
> +    case MSR_IA32_VMX_TRUE_ENTRY_CTLS:
> +        if ( !(vmx_basic_msr_high & VMX_BASIC_DEFAULT1_ZERO >> 32) )
> +            return 0;
> +    default:
> +        break;

default:
    break;

Is completely useless here.

~Andrew

> +    }
> +
>      rdmsrl(msr, host_data);
>  
>      /*