From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59062) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VK2DS-0007NO-E0 for qemu-devel@nongnu.org; Thu, 12 Sep 2013 04:25:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VK2DN-0005nr-A0 for qemu-devel@nongnu.org; Thu, 12 Sep 2013 04:25:30 -0400 Received: from lhrrgout.huawei.com ([194.213.3.17]:19312) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VK2DM-0005ni-Uy for qemu-devel@nongnu.org; Thu, 12 Sep 2013 04:25:25 -0400 Message-ID: <52317A6C.20400@huawei.com> Date: Thu, 12 Sep 2013 10:25:16 +0200 From: Claudio Fontana MIME-Version: 1.0 References: <1378144503-15808-1-git-send-email-rth@twiddle.net> <1378144503-15808-2-git-send-email-rth@twiddle.net> In-Reply-To: <1378144503-15808-2-git-send-email-rth@twiddle.net> Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v3 01/29] tcg-aarch64: Set ext based on TCG_OPF_64BIT List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson Cc: qemu-devel@nongnu.org On 02.09.2013 19:54, Richard Henderson wrote: > Signed-off-by: Richard Henderson > --- > tcg/aarch64/tcg-target.c | 28 +++++++--------------------- > 1 file changed, 7 insertions(+), 21 deletions(-) > > diff --git a/tcg/aarch64/tcg-target.c b/tcg/aarch64/tcg-target.c > index 55ff700..5b067fe 100644 > --- a/tcg/aarch64/tcg-target.c > +++ b/tcg/aarch64/tcg-target.c > @@ -1105,9 +1105,9 @@ static inline void tcg_out_load_pair(TCGContext *s, TCGReg addr, > static void tcg_out_op(TCGContext *s, TCGOpcode opc, > const TCGArg *args, const int *const_args) > { > - /* ext will be set in the switch below, which will fall through to the > - common code. It triggers the use of extended regs where appropriate. */ > - int ext = 0; > + /* 99% of the time, we can signal the use of extension registers > + by looking to see if the opcode handles 64-bit data. */ > + bool ext = (tcg_op_defs[opc].flags & TCG_OPF_64BIT) != 0; > > switch (opc) { > case INDEX_op_exit_tb: > @@ -1163,7 +1163,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, > break; > > case INDEX_op_mov_i64: > - ext = 1; /* fall through */ > case INDEX_op_mov_i32: > tcg_out_movr(s, ext, args[0], args[1]); > break; > @@ -1176,43 +1175,36 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, > break; > > case INDEX_op_add_i64: > - ext = 1; /* fall through */ > case INDEX_op_add_i32: > tcg_out_arith(s, ARITH_ADD, ext, args[0], args[1], args[2], 0); > break; > > case INDEX_op_sub_i64: > - ext = 1; /* fall through */ > case INDEX_op_sub_i32: > tcg_out_arith(s, ARITH_SUB, ext, args[0], args[1], args[2], 0); > break; > > case INDEX_op_and_i64: > - ext = 1; /* fall through */ > case INDEX_op_and_i32: > tcg_out_arith(s, ARITH_AND, ext, args[0], args[1], args[2], 0); > break; > > case INDEX_op_or_i64: > - ext = 1; /* fall through */ > case INDEX_op_or_i32: > tcg_out_arith(s, ARITH_OR, ext, args[0], args[1], args[2], 0); > break; > > case INDEX_op_xor_i64: > - ext = 1; /* fall through */ > case INDEX_op_xor_i32: > tcg_out_arith(s, ARITH_XOR, ext, args[0], args[1], args[2], 0); > break; > > case INDEX_op_mul_i64: > - ext = 1; /* fall through */ > case INDEX_op_mul_i32: > tcg_out_mul(s, ext, args[0], args[1], args[2]); > break; > > case INDEX_op_shl_i64: > - ext = 1; /* fall through */ > case INDEX_op_shl_i32: > if (const_args[2]) { /* LSL / UBFM Wd, Wn, (32 - m) */ > tcg_out_shl(s, ext, args[0], args[1], args[2]); > @@ -1222,7 +1214,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, > break; > > case INDEX_op_shr_i64: > - ext = 1; /* fall through */ > case INDEX_op_shr_i32: > if (const_args[2]) { /* LSR / UBFM Wd, Wn, m, 31 */ > tcg_out_shr(s, ext, args[0], args[1], args[2]); > @@ -1232,7 +1223,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, > break; > > case INDEX_op_sar_i64: > - ext = 1; /* fall through */ > case INDEX_op_sar_i32: > if (const_args[2]) { /* ASR / SBFM Wd, Wn, m, 31 */ > tcg_out_sar(s, ext, args[0], args[1], args[2]); > @@ -1242,7 +1232,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, > break; > > case INDEX_op_rotr_i64: > - ext = 1; /* fall through */ > case INDEX_op_rotr_i32: > if (const_args[2]) { /* ROR / EXTR Wd, Wm, Wm, m */ > tcg_out_rotr(s, ext, args[0], args[1], args[2]); > @@ -1252,7 +1241,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, > break; > > case INDEX_op_rotl_i64: > - ext = 1; /* fall through */ > case INDEX_op_rotl_i32: /* same as rotate right by (32 - m) */ > if (const_args[2]) { /* ROR / EXTR Wd, Wm, Wm, 32 - m */ > tcg_out_rotl(s, ext, args[0], args[1], args[2]); > @@ -1265,14 +1253,12 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, > break; > > case INDEX_op_brcond_i64: > - ext = 1; /* fall through */ > case INDEX_op_brcond_i32: /* CMP 0, 1, cond(2), label 3 */ > tcg_out_cmp(s, ext, args[0], args[1], 0); > tcg_out_goto_label_cond(s, args[2], args[3]); > break; > > case INDEX_op_setcond_i64: > - ext = 1; /* fall through */ > case INDEX_op_setcond_i32: > tcg_out_cmp(s, ext, args[1], args[2], 0); > tcg_out_cset(s, 0, args[0], args[3]); There's not point to change to 'bool' if you pass '0': either we keep as int, and we pass 0, or we change to bool, and we pass 'false'. There are instances of this also in successive patches, I point out only this one, but it should be checked in the whole series. > @@ -1315,9 +1301,11 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, > tcg_out_qemu_st(s, args, 3); > break; > > - case INDEX_op_bswap64_i64: > - ext = 1; /* fall through */ > case INDEX_op_bswap32_i64: > + /* Despite the _i64, this is a 32-bit bswap. */ > + ext = 0; > + /* FALLTHRU */ > + case INDEX_op_bswap64_i64: we waste too much y space here, which gives context and is a scarse resource. What about case INDEX_op_bswap32_i64: /* Despite the _i64, this is a 32-bit bswap. */ ext = false; /* FALLTHRU */ > case INDEX_op_bswap32_i32: > tcg_out_rev(s, ext, args[0], args[1]); > break; > @@ -1327,12 +1315,10 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, > break; > > case INDEX_op_ext8s_i64: > - ext = 1; /* fall through */ > case INDEX_op_ext8s_i32: > tcg_out_sxt(s, ext, 0, args[0], args[1]); > break; > case INDEX_op_ext16s_i64: > - ext = 1; /* fall through */ > case INDEX_op_ext16s_i32: > tcg_out_sxt(s, ext, 1, args[0], args[1]); > break; > C.