From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Lezcano Subject: Re: [PATCH v2 00/12] CPU idle for Armada XP Date: Fri, 13 Sep 2013 17:19:17 +0200 Message-ID: <52332CF5.8050404@linaro.org> References: <1379066801-16276-1-git-send-email-gregory.clement@free-electrons.com> <20130913110043.GJ19363@lunn.ch> <5232F43D.4040404@free-electrons.com> <871u4shj6i.fsf@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <871u4shj6i.fsf@linaro.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Kevin Hilman Cc: Lior Amsalem , Andrew Lunn , Ike Pan , Atsushi Yamagata , Nadav Haklai , David Marlin , Yehuda Yitschak , Tawfik Bayouk , Dan Frazier , Eran Ben-Avi , Ezequiel Garcia , Leif Lindholm , Sebastian Hesselbarth , Tomonori Kimura , Jason Cooper , Nobuhiro Iwamatsu , linux-pm@vger.kernel.org, Jon Masters , "Rafael J. Wysocki" , Hironobu Shibata , Gregory CLEMENT , linux-arm-kernel@lists.infradead.orgThomas Petazzoni List-Id: linux-pm@vger.kernel.org T24gMDkvMTMvMjAxMyAwNDo0OCBQTSwgS2V2aW4gSGlsbWFuIHdyb3RlOgo+IEdyZWdvcnkgQ0xF TUVOVCA8Z3JlZ29yeS5jbGVtZW50QGZyZWUtZWxlY3Ryb25zLmNvbT4gd3JpdGVzOgo+IAo+PiBP biAxMy8wOS8yMDEzIDEzOjAwLCBBbmRyZXcgTHVubiB3cm90ZToKPj4+Cj4+PiBPbiBGcmksIFNl cCAxMywgMjAxMyBhdCAxMjowNjoyOVBNICswMjAwLCBHcmVnb3J5IENMRU1FTlQgd3JvdGU6Cj4+ Pj4gSGVsbG8sCj4+Pj4KPj4+PiBUaGlzIHBhdGNoIHNldCBhZGRzIHRoZSBDUFUgaWRsZSBzdXBw b3J0IGZvciBBcm1hZGEgWFAgYW5kIHByZXBhcmVzCj4+Pj4gdGhlIHN1cHBvcnQgZm9yIEFybWFk YSAzNzAuIFRoaXMgd2FzIGJhc2VkIG9uIHRoZSB3b3JrIG9mIE5hZGF2Cj4+Pj4gSGFrbGFpLgo+ Pj4KPj4+IEhpIEdyZWdvcnkuCj4+Pgo+Pj4gS2lya3dvb2QgaGFzIHRoZSBhYmlsaXR5IHRvIHB1 dCB0aGUgRERSIGludG8gc2VsZiByZWZyZXNoIG1vZGUsIHdoaWNoCj4+PiBpcyB1c2VkIGFzIHBh cnQgb2YgdGhlIHNlY29uZCBsZXZlbCBpZGxlIG1vZGUuIERvZXMgMzcwL1hQIGhhdmUgdGhpcz8K Pj4KPj4gSW5kZWVkIHRoZXJlIGlzIGEgc2VsZiByZWZyZXNoIGJpdCBvbiBhIEREUiByZWxhdGVk IHJlZ2lzdGVyLiBJIHRob3VnaHQKPj4gdGhpcyBraW5kIG9mIGZlYXR1cmUgaXMgbW9yZSBsaWtl bHkgdXNlZCBmb3Igc3VzcGVuZCB0byByYW0uCj4+Cj4+IFdlIHBsYW4gdG8gYWxzbyBzdWJtaXQg dGhlIHN1c3BlbmQgdG8gcmFtIGJ1dCBub3QgaW1tZWRpYXRlbHkuCj4+Cj4+Pgo+Pj4gRm9yIFhQ LCB3aXRoIGl0IGJlaW5nIFNNUCwgaXQgd291bGQgYmUgYSBiaXQgbW9yZSBjb21wbGV4LCBzaW5j ZSB5b3UKPj4+IHdvdWxkIG5vdCB3YW50IHRvIHVzZSBpdCB1bmxlc3MgYWxsIENQVXMgd2VyZSBp ZGxlLgo+Pgo+PiBJIHdvbmRlciBob3cgdGhlIG90aGVycyBTTVAgQVJNIFNvQ3MgZGVhbCB3aXRo IGl0LCBJIGhvcGUgdGhpcyB0aW1lCj4+IHRoZXJlIHdpbGwgYmUgYSBmcmFtZXdvcmsgYXZhaWxh YmxlIGFuZCB3ZSB3b24ndCBoYXZlIHRvIGNyZWF0ZSBpdCEgOykKPiAKPiBZb3Ugc2hvdWxkbid0 IGhhdmUgdG8gaW52ZW50IGFueXRoaW5nIGhlcmUuCj4gCj4gRm9yIGxvdy1wb3dlciBzdGF0ZXMg dGhhdCByZXF1aXJlIGFsbCBDUFVzIHRvIGJlIGlkbGUsIHdlIGhhdmUgImNvdXBsZWQiCj4gQ1BV aWRsZSBzdGF0ZXMgKGMuZi4gZHJpdmVycy9jcHVpZGxlL2NvdXBsZWQuKSAgT01BUCBhbmQgVGVn cmEgYXJlIHVzaW5nCj4gdGhpcywgYnV0IEkgYmVsaWV2ZSBEYW5pZWwgd2FudHMgdG8gbW92ZSBh d2F5IGZyb20gdGhpcywgc28gSSdsbCBsZXQgaGltCj4gZWxhYm9yYXRlLgoKWWVzLCBJIHdvdWxk IG5vdCByZWNvbW1lbmQgdG8gdXNlIHRoZSAiY291cGxlZCIgaWRsZSBzdGF0ZXMgdW5sZXNzIHlv dQpoYXZlIGEgZ29vZCByZWFzb24gdG8gZG8gdGhhdCAoZWcuIG9ubHkgQ1BVMCBjYW4gZG8gc2V0 IHRoZSBQTVUpLgoKSWYgdGhlIGJvYXJkIHByb3ZpZGVzIGVub3VnaCBtZWNoYW5pc21zIHdpdGgg dGhlIFBNU1UsIHRoZXJlIGlzIGFuCmFsdGVybmF0ZSwgbG9ja2xlc3MsIHN5bmMgYWxnb3JpdGht LCB3aGljaCBjYW4gYmUgcmV1c2VkLCBpbiB0aGUgdXg1MDAncwpjcHVpZGxlIGRyaXZlciAoYy5m LiBkcml2ZXJzL2NwdWlkbGUvY3B1aWRsZS11eDUwMC5jKS4KCk90aGVyd2lzZSwgSSByZWNvbW1l bmQgdG8gaGF2ZSBhIGxvb2sgYXQgTUNQTSAoYy5mCmRyaXZlcnMvY3B1aWRsZS9jcHVpZGxlLWJp Z19saXR0bGUuYykuCgogIC0tIERhbmllbAoKCi0tIAogPGh0dHA6Ly93d3cubGluYXJvLm9yZy8+ IExpbmFyby5vcmcg4pSCIE9wZW4gc291cmNlIHNvZnR3YXJlIGZvciBBUk0gU29DcwoKRm9sbG93 IExpbmFybzogIDxodHRwOi8vd3d3LmZhY2Vib29rLmNvbS9wYWdlcy9MaW5hcm8+IEZhY2Vib29r IHwKPGh0dHA6Ly90d2l0dGVyLmNvbS8jIS9saW5hcm9vcmc+IFR3aXR0ZXIgfAo8aHR0cDovL3d3 dy5saW5hcm8ub3JnL2xpbmFyby1ibG9nLz4gQmxvZwoKCl9fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fCmxpbnV4LWFybS1rZXJuZWwgbWFpbGluZyBsaXN0Cmxp bnV4LWFybS1rZXJuZWxAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRwOi8vbGlzdHMuaW5mcmFkZWFk Lm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpbnV4LWFybS1rZXJuZWwK From mboxrd@z Thu Jan 1 00:00:00 1970 From: daniel.lezcano@linaro.org (Daniel Lezcano) Date: Fri, 13 Sep 2013 17:19:17 +0200 Subject: [PATCH v2 00/12] CPU idle for Armada XP In-Reply-To: <871u4shj6i.fsf@linaro.org> References: <1379066801-16276-1-git-send-email-gregory.clement@free-electrons.com> <20130913110043.GJ19363@lunn.ch> <5232F43D.4040404@free-electrons.com> <871u4shj6i.fsf@linaro.org> Message-ID: <52332CF5.8050404@linaro.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 09/13/2013 04:48 PM, Kevin Hilman wrote: > Gregory CLEMENT writes: > >> On 13/09/2013 13:00, Andrew Lunn wrote: >>> >>> On Fri, Sep 13, 2013 at 12:06:29PM +0200, Gregory CLEMENT wrote: >>>> Hello, >>>> >>>> This patch set adds the CPU idle support for Armada XP and prepares >>>> the support for Armada 370. This was based on the work of Nadav >>>> Haklai. >>> >>> Hi Gregory. >>> >>> Kirkwood has the ability to put the DDR into self refresh mode, which >>> is used as part of the second level idle mode. Does 370/XP have this? >> >> Indeed there is a self refresh bit on a DDR related register. I thought >> this kind of feature is more likely used for suspend to ram. >> >> We plan to also submit the suspend to ram but not immediately. >> >>> >>> For XP, with it being SMP, it would be a bit more complex, since you >>> would not want to use it unless all CPUs were idle. >> >> I wonder how the others SMP ARM SoCs deal with it, I hope this time >> there will be a framework available and we won't have to create it! ;) > > You shouldn't have to invent anything here. > > For low-power states that require all CPUs to be idle, we have "coupled" > CPUidle states (c.f. drivers/cpuidle/coupled.) OMAP and Tegra are using > this, but I believe Daniel wants to move away from this, so I'll let him > elaborate. Yes, I would not recommend to use the "coupled" idle states unless you have a good reason to do that (eg. only CPU0 can do set the PMU). If the board provides enough mechanisms with the PMSU, there is an alternate, lockless, sync algorithm, which can be reused, in the ux500's cpuidle driver (c.f. drivers/cpuidle/cpuidle-ux500.c). Otherwise, I recommend to have a look at MCPM (c.f drivers/cpuidle/cpuidle-big_little.c). -- Daniel -- Linaro.org ? Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog