From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41276) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VMHo8-0004bV-7R for qemu-devel@nongnu.org; Wed, 18 Sep 2013 09:28:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VMHo2-0005HN-7X for qemu-devel@nongnu.org; Wed, 18 Sep 2013 09:28:40 -0400 Received: from mx1.redhat.com ([209.132.183.28]:17686) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VMHo1-0005H6-Uk for qemu-devel@nongnu.org; Wed, 18 Sep 2013 09:28:34 -0400 Message-ID: <5239AA8B.2090200@redhat.com> Date: Wed, 18 Sep 2013 15:28:43 +0200 From: Paolo Bonzini MIME-Version: 1.0 References: <20130917162928.GA20672@redhat.com> <52388A3D.4090909@redhat.com> <20130917170752.GA20986@redhat.com> <52388E5F.6020802@redhat.com> <20130917172627.GA21064@redhat.com> <5238A859.9040705@redhat.com> <20130917195123.GB21419@redhat.com> <5238D18B.6020901@redhat.com> <20130918054848.GB23532@redhat.com> <523958E3.6020906@redhat.com> <20130918084138.GA31069@redhat.com> <52398DD8.3050805@redhat.com> <5239A693.2070409@redhat.com> In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v2 00/38] Delay destruction of memory regions to instance_finalize List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: QEMU Developers , "Michael S. Tsirkin" Il 18/09/2013 15:19, Peter Maydell ha scritto: > > There's nothing magic, really. Both PV and real devices have been doing > > it forever by placing some registers in RAM instead of MMIO, and > > communicating synchronization points via interrupts and doorbell registers. > > Sure, but that's a hardware design choice, it's different from > ripping out the assumptions about device behaviour from > underneath an existing driver. That's why I wrote: Devices have to request BQL-free MMIO explicitly. You can just use all the infrastructure to do unlocked bus-master DMA, you can limit BQL-free MMIO to PV devices, or to extremely simple devices, or to one or two highly-optimized registers. Of course the choice of what's safe and what's not depends on the hardware design and on what the device can expect from the drivers (the PCI spec doesn't forbid putting additional requirements). Paolo