Re: PCI DMA to small buffers on cache-incoherent arch

[Roland Dreier <roland@topspin.com>]

>>>>> "David" == David S Miller <davem@redhat.com> writes:

    Paul> This is the problem scenario.  Suppose we are doing DMA to a
    Paul> buffer B and also independently accessing a variable X which
    Paul> is not part of B.  Suppose that X and the beginning of B are
    Paul> both in cache line C.
   
    David> I see what the problem is.  Hmmm...

    David> I'm trying to specify this such that knowledge of
    David> cachelines and whatnot don't escape the arch specific code,
    David> ho hum...  Looks like that isn't possible.

So is the consensus now that in general drivers should make sure any
buffers passed to pci_map/unmap are aligned to SMP_CACHE_BYTES (and a
multiple of SMP_CACHE_BYTES in size)?  In other words if a driver uses
an unaligned buffer it should be fixed unless we can prove (and
document in a comment :) that it won't cause problems on an arch
without cache coherency and with a writeback cache.

Thanks,
  Roland