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diff for duplicates of <524021EC.2000207@marvell.com>

diff --git a/a/1.txt b/N1/1.txt
index 1a6f882..ab01178 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -61,3 +61,17 @@ So do u have any suggestion for this failure?
 
 Thx,
 Leo Yan
+-------------- next part --------------
+A non-text attachment was scrubbed...
+Name: 0001-cpuidle-add-simple-driver-for-arm64.patch
+Type: text/x-patch
+Size: 5866 bytes
+Desc: not available
+URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20130923/1711d443/attachment-0002.bin>
+-------------- next part --------------
+A non-text attachment was scrubbed...
+Name: 0002-ARM64-add-cpu-tear-down-function-for-A53-s-power-mod.patch
+Type: text/x-patch
+Size: 4314 bytes
+Desc: not available
+URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20130923/1711d443/attachment-0003.bin>
diff --git a/a/2.hdr b/a/2.hdr
deleted file mode 100644
index cc266e6..0000000
--- a/a/2.hdr
+++ /dev/null
@@ -1,5 +0,0 @@
-Content-Type: text/x-patch;
-	name="0001-cpuidle-add-simple-driver-for-arm64.patch"
-Content-Transfer-Encoding: 7bit
-Content-Disposition: attachment;
-	filename="0001-cpuidle-add-simple-driver-for-arm64.patch"
diff --git a/a/2.txt b/a/2.txt
deleted file mode 100644
index f224065..0000000
--- a/a/2.txt
+++ /dev/null
@@ -1,225 +0,0 @@
->From a1aa5dd0924b8c7493c6fec31c00b2feba7f5ad7 Mon Sep 17 00:00:00 2001
-From: Leo Yan <leoy@marvell.com>
-Date: Mon, 23 Sep 2013 17:05:42 +0800
-Subject: [PATCH 1/2] cpuidle: add simple driver for arm64
-
-Signed-off-by: Leo Yan <leoy@marvell.com>
----
- drivers/cpuidle/Kconfig         |    6 ++
- drivers/cpuidle/Makefile        |    1 +
- drivers/cpuidle/cpuidle-arm64.c |  180 +++++++++++++++++++++++++++++++++++++++
- 3 files changed, 187 insertions(+)
- create mode 100644 drivers/cpuidle/cpuidle-arm64.c
-
-diff --git a/drivers/cpuidle/Kconfig b/drivers/cpuidle/Kconfig
-index c4cc27e..361325e 100644
---- a/drivers/cpuidle/Kconfig
-+++ b/drivers/cpuidle/Kconfig
-@@ -39,4 +39,10 @@ config CPU_IDLE_CALXEDA
- 	help
- 	  Select this to enable cpuidle on Calxeda processors.
- 
-+config CPU_IDLE_ARM64
-+	bool "CPU Idle Driver for ARM64"
-+	depends on ARM64
-+	help
-+	  Select this to enable cpuidle on ARM64 processors.
-+
- endif
-diff --git a/drivers/cpuidle/Makefile b/drivers/cpuidle/Makefile
-index 0d8bd55..954b67f 100644
---- a/drivers/cpuidle/Makefile
-+++ b/drivers/cpuidle/Makefile
-@@ -7,3 +7,4 @@ obj-$(CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED) += coupled.o
- 
- obj-$(CONFIG_CPU_IDLE_CALXEDA) += cpuidle-calxeda.o
- obj-$(CONFIG_ARCH_KIRKWOOD) += cpuidle-kirkwood.o
-+obj-$(CONFIG_CPU_IDLE_ARM64) += cpuidle-arm64.o
-diff --git a/drivers/cpuidle/cpuidle-arm64.c b/drivers/cpuidle/cpuidle-arm64.c
-new file mode 100644
-index 0000000..7d376db
---- /dev/null
-+++ b/drivers/cpuidle/cpuidle-arm64.c
-@@ -0,0 +1,180 @@
-+/*
-+ * ARM64 CPU idle driver.
-+ *
-+ * Copyright (C) 2012 ARM Ltd.
-+ * Author: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+#include <linux/bitmap.h>
-+#include <linux/cpuidle.h>
-+#include <linux/cpu_pm.h>
-+#include <linux/clockchips.h>
-+#include <linux/debugfs.h>
-+#include <linux/hrtimer.h>
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/tick.h>
-+#include <asm/proc-fns.h>
-+#include <asm/suspend.h>
-+#include <asm/cacheflush.h>
-+
-+static int arm64_cpuidle_simple_enter(struct cpuidle_device *dev,
-+		struct cpuidle_driver *drv, int index)
-+{
-+	ktime_t time_start, time_end;
-+	s64 diff;
-+
-+	time_start = ktime_get();
-+
-+	cpu_do_idle();
-+
-+	time_end = ktime_get();
-+
-+	local_irq_enable();
-+
-+	diff = ktime_to_us(ktime_sub(time_end, time_start));
-+	if (diff > INT_MAX)
-+		diff = INT_MAX;
-+
-+	dev->last_residency = (int) diff;
-+
-+	return index;
-+}
-+
-+static int arm64_enter_powerdown(struct cpuidle_device *dev,
-+				struct cpuidle_driver *drv, int idx);
-+
-+static struct cpuidle_state arm64_cpuidle_set[] __initdata = {
-+	[0] = {
-+		.enter                  = arm64_cpuidle_simple_enter,
-+		.exit_latency           = 1,
-+		.target_residency       = 1,
-+		.power_usage		= UINT_MAX,
-+		.flags                  = CPUIDLE_FLAG_TIME_VALID,
-+		.name                   = "WFI",
-+		.desc                   = "ARM64 WFI",
-+	},
-+#if 1
-+	[1] = {
-+		.enter			= arm64_enter_powerdown,
-+		.exit_latency		= 300,
-+		.target_residency	= 1000,
-+		.flags			= CPUIDLE_FLAG_TIME_VALID,
-+		.name			= "C1",
-+		.desc			= "ARM64 power down",
-+	},
-+#endif
-+};
-+
-+struct cpuidle_driver arm64_idle_driver = {
-+	.name = "arm64_idle",
-+	.owner = THIS_MODULE,
-+	.safe_state_index = 0
-+};
-+
-+static DEFINE_PER_CPU(struct cpuidle_device, arm64_idle_dev);
-+
-+extern void arm64_cpu_tear_down(void);
-+typedef void (*phys_reset_t)(unsigned long);
-+
-+static int notrace arm64_powerdown_finisher(unsigned long arg)
-+{
-+	phys_reset_t phys_reset;
-+
-+	setup_mm_for_reboot();
-+
-+	arm64_cpu_tear_down();
-+	wfi();
-+
-+	phys_reset = (phys_reset_t)(unsigned long)virt_to_phys(cpu_reset);
-+	phys_reset(virt_to_phys(cpu_resume));
-+
-+	/* should never get here */
-+	BUG();
-+}
-+
-+/*
-+ * arm64_enter_powerdown - Programs CPU to enter the specified state
-+ * @dev: cpuidle device
-+ * @drv: The target state to be programmed
-+ * @idx: state index
-+ *
-+ * Called from the CPUidle framework to program the device to the
-+ * specified target state selected by the governor.
-+ */
-+static int arm64_enter_powerdown(struct cpuidle_device *dev,
-+				struct cpuidle_driver *drv, int idx)
-+{
-+	struct timespec ts_preidle, ts_postidle, ts_idle;
-+	int ret;
-+
-+	/* Used to keep track of the total time in idle */
-+	getnstimeofday(&ts_preidle);
-+
-+	BUG_ON(!irqs_disabled());
-+
-+	cpu_pm_enter();
-+
-+	clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu);
-+
-+	ret = cpu_suspend((unsigned long) dev, arm64_powerdown_finisher);
-+	if (ret)
-+		BUG();
-+
-+	clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu);
-+
-+	cpu_pm_exit();
-+
-+	getnstimeofday(&ts_postidle);
-+	local_irq_enable();
-+	ts_idle = timespec_sub(ts_postidle, ts_preidle);
-+
-+	dev->last_residency = ts_idle.tv_nsec / NSEC_PER_USEC +
-+					ts_idle.tv_sec * USEC_PER_SEC;
-+	return idx;
-+}
-+
-+/*
-+ * arm64_idle_init
-+ *
-+ * Registers the bl specific cpuidle driver with the cpuidle
-+ * framework with the valid set of states.
-+ */
-+int __init arm64_idle_init(void)
-+{
-+	struct cpuidle_device *dev;
-+	int i, cpu_id;
-+	struct cpuidle_driver *drv = &arm64_idle_driver;
-+
-+	drv->state_count = (sizeof(arm64_cpuidle_set) /
-+				       sizeof(struct cpuidle_state));
-+
-+	for (i = 0; i < drv->state_count; i++) {
-+		memcpy(&drv->states[i], &arm64_cpuidle_set[i],
-+				sizeof(struct cpuidle_state));
-+	}
-+
-+	cpuidle_register_driver(drv);
-+
-+	for_each_cpu(cpu_id, cpu_online_mask) {
-+		pr_err("CPUidle for CPU%d registered\n", cpu_id);
-+		dev = &per_cpu(arm64_idle_dev, cpu_id);
-+		dev->cpu = cpu_id;
-+
-+		dev->state_count = drv->state_count;
-+
-+		if (cpuidle_register_device(dev)) {
-+			printk(KERN_ERR "%s: Cpuidle register device failed\n",
-+			       __func__);
-+			return -EIO;
-+		}
-+	}
-+
-+	return 0;
-+}
-+
-+device_initcall(arm64_idle_init);
--- 
-1.7.9.5
diff --git a/a/3.hdr b/a/3.hdr
deleted file mode 100644
index d93a2dd..0000000
--- a/a/3.hdr
+++ /dev/null
@@ -1,6 +0,0 @@
-Content-Type: text/x-patch;
-	name="0002-ARM64-add-cpu-tear-down-function-for-A53-s-power-mod.patch"
-Content-Transfer-Encoding: 7bit
-Content-Disposition: attachment;
-	filename*0="0002-ARM64-add-cpu-tear-down-function-for-A53-s-power-mod.pa";
-	filename*1="tch"
diff --git a/a/3.txt b/a/3.txt
deleted file mode 100644
index 6b875d1..0000000
--- a/a/3.txt
+++ /dev/null
@@ -1,123 +0,0 @@
->From e238ddfc426bd1f8b2ac3b5f396a31150cbe7e5c Mon Sep 17 00:00:00 2001
-From: Leo Yan <leoy@marvell.com>
-Date: Mon, 23 Sep 2013 17:06:20 +0800
-Subject: [PATCH 2/2] ARM64: add cpu tear down function for A53's power mode
-
-Signed-off-by: Leo Yan <leoy@marvell.com>
----
- arch/arm64/kernel/Makefile        |    2 +-
- arch/arm64/kernel/cpu_tear_down.S |   90 +++++++++++++++++++++++++++++++++++++
- 2 files changed, 91 insertions(+), 1 deletion(-)
- create mode 100644 arch/arm64/kernel/cpu_tear_down.S
-
-diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
-index 010550a..046fbf0 100644
---- a/arch/arm64/kernel/Makefile
-+++ b/arch/arm64/kernel/Makefile
-@@ -18,7 +18,7 @@ arm64-obj-$(CONFIG_SMP)			+= smp.o smp_spin_table.o smp_psci.o
- arm64-obj-$(CONFIG_HW_PERF_EVENTS)	+= perf_event.o
- arm64-obj-$(CONFIG_HAVE_HW_BREAKPOINT)+= hw_breakpoint.o
- arm64-obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
--arm64-obj-$(CONFIG_ARM_CPU_SUSPEND)	+= sleep.o suspend.o
-+arm64-obj-$(CONFIG_ARM_CPU_SUSPEND)	+= sleep.o suspend.o cpu_tear_down.o
- 
- arm64-obj-$(CONFIG_SUSPEND)		+= fake_suspend.o
- obj-y					+= $(arm64-obj-y) vdso/
-diff --git a/arch/arm64/kernel/cpu_tear_down.S b/arch/arm64/kernel/cpu_tear_down.S
-new file mode 100644
-index 0000000..9f3d5d0
---- /dev/null
-+++ b/arch/arm64/kernel/cpu_tear_down.S
-@@ -0,0 +1,90 @@
-+/*
-+ * arch/arm64/mach-vexpress/sleep.S
-+ *
-+ * Copyright (c) 2013 Marvell Semiconductor Inc.
-+ *
-+ * Author: Leo Yan <leoy@marvell.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along
-+ * with this program; if not, write to the Free Software Foundation, Inc.,
-+ * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-+ */
-+
-+#include <linux/linkage.h>
-+#include <linux/init.h>
-+#include <asm/assembler.h>
-+
-+/*
-+ * Exits SMP coherency.
-+ */
-+ENTRY(arm64_cpu_tear_down)
-+	mov	x12, lr
-+
-+	mrs	x0, sctlr_el1
-+	bic	x0, x0, #1 << 2			// clear SCTLR.C
-+	msr	sctlr_el1, x0
-+	isb
-+
-+	dsb	sy				// ensure ordering with previous memory accesses
-+	mrs	x0, clidr_el1			// read clidr
-+	and	x3, x0, #0x7000000		// extract loc from clidr
-+	lsr	x3, x3, #23			// left align loc bit field
-+	cbz	x3, finished			// if loc is 0, then no need to clean
-+	mov	x10, #0				// start clean at cache level 0
-+
-+	add	x2, x10, x10, lsr #1		// work out 3x current cache level
-+	lsr	x1, x0, x2			// extract cache type bits from clidr
-+	and	x1, x1, #7			// mask of the bits for current cache only
-+	cmp	x1, #2				// see what cache we have at this level
-+	b.lt	skip				// skip if no cache, or just i-cache
-+	save_and_disable_irqs x9		// make CSSELR and CCSIDR access atomic
-+	msr	csselr_el1, x10			// select current cache level in csselr
-+	isb					// isb to sych the new cssr&csidr
-+	mrs	x1, ccsidr_el1			// read the new ccsidr
-+	restore_irqs x9
-+	and	x2, x1, #7			// extract the length of the cache lines
-+	add	x2, x2, #4			// add 4 (line length offset)
-+	mov	x4, #0x3ff
-+	and	x4, x4, x1, lsr #3		// find maximum number on the way size
-+	clz	w5, w4				// find bit position of way size increment
-+	mov	x7, #0x7fff
-+	and	x7, x7, x1, lsr #13		// extract max number of the index size
-+loop2:
-+	mov	x9, x4				// create working copy of max way size
-+loop3:
-+	lsl	x6, x9, x5
-+	orr	x11, x10, x6			// factor way and cache number into x11
-+	lsl	x6, x7, x2
-+	orr	x11, x11, x6			// factor index number into x11
-+	dc	cisw, x11			// clean & invalidate by set/way
-+	subs	x9, x9, #1			// decrement the way
-+	b.ge	loop3
-+	subs	x7, x7, #1			// decrement the index
-+	b.ge	loop2
-+
-+skip:
-+finished:
-+	mov	x10, #0				// swith back to cache level 0
-+	msr	csselr_el1, x10			// select current cache level in csselr
-+	dsb	sy
-+	isb
-+
-+	mrs	x0, S3_1_C15_C2_1
-+	bic	x0, x0, #0x1 << 6		// disable SMP bit
-+	msr	S3_1_C15_C2_1, x0
-+	dsb	sy
-+	isb
-+
-+	ret	x12
-+ENDPROC(arm64_cpu_tear_down)
-+
--- 
-1.7.9.5
diff --git a/a/content_digest b/N1/content_digest
index 98353bd..24f2e96 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,15 +1,10 @@
  "ref\052327E41.1070904@marvell.com\0"
  "ref\020130913144001.GA28531@e102568-lin.cambridge.arm.com\0"
- "From\0Leo Yan <leoy@marvell.com>\0"
- "Subject\0Re: [Question] Verification For arm64: suspend/resume implementation\0"
+ "From\0leoy@marvell.com (Leo Yan)\0"
+ "Subject\0[Question] Verification For arm64: suspend/resume implementation\0"
  "Date\0Mon, 23 Sep 2013 19:11:40 +0800\0"
- "To\0Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>\0"
- "Cc\0linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>"
-  linux-pm@vger.kernel.org <linux-pm@vger.kernel.org>
-  Zhou Zhu <zzhu3@marvell.com>
-  Yu Tang <ytang5@marvell.com>
- " Neil Zhang <zhangwm@marvell.com>\0"
- "\01:1\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
+ "\00:1\0"
  "b\0"
  "On 09/13/2013 10:40 PM, Lorenzo Pieralisi wrote:\n"
  "> On Fri, Sep 13, 2013 at 03:53:53AM +0100, Leo Yan wrote:\n"
@@ -73,360 +68,20 @@
  "\n"
  "\n"
  "Thx,\n"
- Leo Yan
- "\01:2\0"
- "fn\00001-cpuidle-add-simple-driver-for-arm64.patch\0"
- "b\0"
- ">From a1aa5dd0924b8c7493c6fec31c00b2feba7f5ad7 Mon Sep 17 00:00:00 2001\n"
- "From: Leo Yan <leoy@marvell.com>\n"
- "Date: Mon, 23 Sep 2013 17:05:42 +0800\n"
- "Subject: [PATCH 1/2] cpuidle: add simple driver for arm64\n"
- "\n"
- "Signed-off-by: Leo Yan <leoy@marvell.com>\n"
- "---\n"
- " drivers/cpuidle/Kconfig         |    6 ++\n"
- " drivers/cpuidle/Makefile        |    1 +\n"
- " drivers/cpuidle/cpuidle-arm64.c |  180 +++++++++++++++++++++++++++++++++++++++\n"
- " 3 files changed, 187 insertions(+)\n"
- " create mode 100644 drivers/cpuidle/cpuidle-arm64.c\n"
- "\n"
- "diff --git a/drivers/cpuidle/Kconfig b/drivers/cpuidle/Kconfig\n"
- "index c4cc27e..361325e 100644\n"
- "--- a/drivers/cpuidle/Kconfig\n"
- "+++ b/drivers/cpuidle/Kconfig\n"
- "@@ -39,4 +39,10 @@ config CPU_IDLE_CALXEDA\n"
- " \thelp\n"
- " \t  Select this to enable cpuidle on Calxeda processors.\n"
- " \n"
- "+config CPU_IDLE_ARM64\n"
- "+\tbool \"CPU Idle Driver for ARM64\"\n"
- "+\tdepends on ARM64\n"
- "+\thelp\n"
- "+\t  Select this to enable cpuidle on ARM64 processors.\n"
- "+\n"
- " endif\n"
- "diff --git a/drivers/cpuidle/Makefile b/drivers/cpuidle/Makefile\n"
- "index 0d8bd55..954b67f 100644\n"
- "--- a/drivers/cpuidle/Makefile\n"
- "+++ b/drivers/cpuidle/Makefile\n"
- "@@ -7,3 +7,4 @@ obj-$(CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED) += coupled.o\n"
- " \n"
- " obj-$(CONFIG_CPU_IDLE_CALXEDA) += cpuidle-calxeda.o\n"
- " obj-$(CONFIG_ARCH_KIRKWOOD) += cpuidle-kirkwood.o\n"
- "+obj-$(CONFIG_CPU_IDLE_ARM64) += cpuidle-arm64.o\n"
- "diff --git a/drivers/cpuidle/cpuidle-arm64.c b/drivers/cpuidle/cpuidle-arm64.c\n"
- "new file mode 100644\n"
- "index 0000000..7d376db\n"
- "--- /dev/null\n"
- "+++ b/drivers/cpuidle/cpuidle-arm64.c\n"
- "@@ -0,0 +1,180 @@\n"
- "+/*\n"
- "+ * ARM64 CPU idle driver.\n"
- "+ *\n"
- "+ * Copyright (C) 2012 ARM Ltd.\n"
- "+ * Author: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>\n"
- "+ *\n"
- "+ * This program is free software; you can redistribute it and/or modify\n"
- "+ * it under the terms of the GNU General Public License version 2 as\n"
- "+ * published by the Free Software Foundation.\n"
- "+ */\n"
- "+\n"
- "+#include <linux/bitmap.h>\n"
- "+#include <linux/cpuidle.h>\n"
- "+#include <linux/cpu_pm.h>\n"
- "+#include <linux/clockchips.h>\n"
- "+#include <linux/debugfs.h>\n"
- "+#include <linux/hrtimer.h>\n"
- "+#include <linux/kernel.h>\n"
- "+#include <linux/module.h>\n"
- "+#include <linux/tick.h>\n"
- "+#include <asm/proc-fns.h>\n"
- "+#include <asm/suspend.h>\n"
- "+#include <asm/cacheflush.h>\n"
- "+\n"
- "+static int arm64_cpuidle_simple_enter(struct cpuidle_device *dev,\n"
- "+\t\tstruct cpuidle_driver *drv, int index)\n"
- "+{\n"
- "+\tktime_t time_start, time_end;\n"
- "+\ts64 diff;\n"
- "+\n"
- "+\ttime_start = ktime_get();\n"
- "+\n"
- "+\tcpu_do_idle();\n"
- "+\n"
- "+\ttime_end = ktime_get();\n"
- "+\n"
- "+\tlocal_irq_enable();\n"
- "+\n"
- "+\tdiff = ktime_to_us(ktime_sub(time_end, time_start));\n"
- "+\tif (diff > INT_MAX)\n"
- "+\t\tdiff = INT_MAX;\n"
- "+\n"
- "+\tdev->last_residency = (int) diff;\n"
- "+\n"
- "+\treturn index;\n"
- "+}\n"
- "+\n"
- "+static int arm64_enter_powerdown(struct cpuidle_device *dev,\n"
- "+\t\t\t\tstruct cpuidle_driver *drv, int idx);\n"
- "+\n"
- "+static struct cpuidle_state arm64_cpuidle_set[] __initdata = {\n"
- "+\t[0] = {\n"
- "+\t\t.enter                  = arm64_cpuidle_simple_enter,\n"
- "+\t\t.exit_latency           = 1,\n"
- "+\t\t.target_residency       = 1,\n"
- "+\t\t.power_usage\t\t= UINT_MAX,\n"
- "+\t\t.flags                  = CPUIDLE_FLAG_TIME_VALID,\n"
- "+\t\t.name                   = \"WFI\",\n"
- "+\t\t.desc                   = \"ARM64 WFI\",\n"
- "+\t},\n"
- "+#if 1\n"
- "+\t[1] = {\n"
- "+\t\t.enter\t\t\t= arm64_enter_powerdown,\n"
- "+\t\t.exit_latency\t\t= 300,\n"
- "+\t\t.target_residency\t= 1000,\n"
- "+\t\t.flags\t\t\t= CPUIDLE_FLAG_TIME_VALID,\n"
- "+\t\t.name\t\t\t= \"C1\",\n"
- "+\t\t.desc\t\t\t= \"ARM64 power down\",\n"
- "+\t},\n"
- "+#endif\n"
- "+};\n"
- "+\n"
- "+struct cpuidle_driver arm64_idle_driver = {\n"
- "+\t.name = \"arm64_idle\",\n"
- "+\t.owner = THIS_MODULE,\n"
- "+\t.safe_state_index = 0\n"
- "+};\n"
- "+\n"
- "+static DEFINE_PER_CPU(struct cpuidle_device, arm64_idle_dev);\n"
- "+\n"
- "+extern void arm64_cpu_tear_down(void);\n"
- "+typedef void (*phys_reset_t)(unsigned long);\n"
- "+\n"
- "+static int notrace arm64_powerdown_finisher(unsigned long arg)\n"
- "+{\n"
- "+\tphys_reset_t phys_reset;\n"
- "+\n"
- "+\tsetup_mm_for_reboot();\n"
- "+\n"
- "+\tarm64_cpu_tear_down();\n"
- "+\twfi();\n"
- "+\n"
- "+\tphys_reset = (phys_reset_t)(unsigned long)virt_to_phys(cpu_reset);\n"
- "+\tphys_reset(virt_to_phys(cpu_resume));\n"
- "+\n"
- "+\t/* should never get here */\n"
- "+\tBUG();\n"
- "+}\n"
- "+\n"
- "+/*\n"
- "+ * arm64_enter_powerdown - Programs CPU to enter the specified state\n"
- "+ * @dev: cpuidle device\n"
- "+ * @drv: The target state to be programmed\n"
- "+ * @idx: state index\n"
- "+ *\n"
- "+ * Called from the CPUidle framework to program the device to the\n"
- "+ * specified target state selected by the governor.\n"
- "+ */\n"
- "+static int arm64_enter_powerdown(struct cpuidle_device *dev,\n"
- "+\t\t\t\tstruct cpuidle_driver *drv, int idx)\n"
- "+{\n"
- "+\tstruct timespec ts_preidle, ts_postidle, ts_idle;\n"
- "+\tint ret;\n"
- "+\n"
- "+\t/* Used to keep track of the total time in idle */\n"
- "+\tgetnstimeofday(&ts_preidle);\n"
- "+\n"
- "+\tBUG_ON(!irqs_disabled());\n"
- "+\n"
- "+\tcpu_pm_enter();\n"
- "+\n"
- "+\tclockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu);\n"
- "+\n"
- "+\tret = cpu_suspend((unsigned long) dev, arm64_powerdown_finisher);\n"
- "+\tif (ret)\n"
- "+\t\tBUG();\n"
- "+\n"
- "+\tclockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu);\n"
- "+\n"
- "+\tcpu_pm_exit();\n"
- "+\n"
- "+\tgetnstimeofday(&ts_postidle);\n"
- "+\tlocal_irq_enable();\n"
- "+\tts_idle = timespec_sub(ts_postidle, ts_preidle);\n"
- "+\n"
- "+\tdev->last_residency = ts_idle.tv_nsec / NSEC_PER_USEC +\n"
- "+\t\t\t\t\tts_idle.tv_sec * USEC_PER_SEC;\n"
- "+\treturn idx;\n"
- "+}\n"
- "+\n"
- "+/*\n"
- "+ * arm64_idle_init\n"
- "+ *\n"
- "+ * Registers the bl specific cpuidle driver with the cpuidle\n"
- "+ * framework with the valid set of states.\n"
- "+ */\n"
- "+int __init arm64_idle_init(void)\n"
- "+{\n"
- "+\tstruct cpuidle_device *dev;\n"
- "+\tint i, cpu_id;\n"
- "+\tstruct cpuidle_driver *drv = &arm64_idle_driver;\n"
- "+\n"
- "+\tdrv->state_count = (sizeof(arm64_cpuidle_set) /\n"
- "+\t\t\t\t       sizeof(struct cpuidle_state));\n"
- "+\n"
- "+\tfor (i = 0; i < drv->state_count; i++) {\n"
- "+\t\tmemcpy(&drv->states[i], &arm64_cpuidle_set[i],\n"
- "+\t\t\t\tsizeof(struct cpuidle_state));\n"
- "+\t}\n"
- "+\n"
- "+\tcpuidle_register_driver(drv);\n"
- "+\n"
- "+\tfor_each_cpu(cpu_id, cpu_online_mask) {\n"
- "+\t\tpr_err(\"CPUidle for CPU%d registered\\n\", cpu_id);\n"
- "+\t\tdev = &per_cpu(arm64_idle_dev, cpu_id);\n"
- "+\t\tdev->cpu = cpu_id;\n"
- "+\n"
- "+\t\tdev->state_count = drv->state_count;\n"
- "+\n"
- "+\t\tif (cpuidle_register_device(dev)) {\n"
- "+\t\t\tprintk(KERN_ERR \"%s: Cpuidle register device failed\\n\",\n"
- "+\t\t\t       __func__);\n"
- "+\t\t\treturn -EIO;\n"
- "+\t\t}\n"
- "+\t}\n"
- "+\n"
- "+\treturn 0;\n"
- "+}\n"
- "+\n"
- "+device_initcall(arm64_idle_init);\n"
- "-- \n"
- 1.7.9.5
- "\01:3\0"
- "fn\00002-ARM64-add-cpu-tear-down-function-for-A53-s-power-mod.patch\0"
- "b\0"
- ">From e238ddfc426bd1f8b2ac3b5f396a31150cbe7e5c Mon Sep 17 00:00:00 2001\n"
- "From: Leo Yan <leoy@marvell.com>\n"
- "Date: Mon, 23 Sep 2013 17:06:20 +0800\n"
- "Subject: [PATCH 2/2] ARM64: add cpu tear down function for A53's power mode\n"
- "\n"
- "Signed-off-by: Leo Yan <leoy@marvell.com>\n"
- "---\n"
- " arch/arm64/kernel/Makefile        |    2 +-\n"
- " arch/arm64/kernel/cpu_tear_down.S |   90 +++++++++++++++++++++++++++++++++++++\n"
- " 2 files changed, 91 insertions(+), 1 deletion(-)\n"
- " create mode 100644 arch/arm64/kernel/cpu_tear_down.S\n"
- "\n"
- "diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile\n"
- "index 010550a..046fbf0 100644\n"
- "--- a/arch/arm64/kernel/Makefile\n"
- "+++ b/arch/arm64/kernel/Makefile\n"
- "@@ -18,7 +18,7 @@ arm64-obj-$(CONFIG_SMP)\t\t\t+= smp.o smp_spin_table.o smp_psci.o\n"
- " arm64-obj-$(CONFIG_HW_PERF_EVENTS)\t+= perf_event.o\n"
- " arm64-obj-$(CONFIG_HAVE_HW_BREAKPOINT)+= hw_breakpoint.o\n"
- " arm64-obj-$(CONFIG_EARLY_PRINTK)\t+= early_printk.o\n"
- "-arm64-obj-$(CONFIG_ARM_CPU_SUSPEND)\t+= sleep.o suspend.o\n"
- "+arm64-obj-$(CONFIG_ARM_CPU_SUSPEND)\t+= sleep.o suspend.o cpu_tear_down.o\n"
- " \n"
- " arm64-obj-$(CONFIG_SUSPEND)\t\t+= fake_suspend.o\n"
- " obj-y\t\t\t\t\t+= $(arm64-obj-y) vdso/\n"
- "diff --git a/arch/arm64/kernel/cpu_tear_down.S b/arch/arm64/kernel/cpu_tear_down.S\n"
- "new file mode 100644\n"
- "index 0000000..9f3d5d0\n"
- "--- /dev/null\n"
- "+++ b/arch/arm64/kernel/cpu_tear_down.S\n"
- "@@ -0,0 +1,90 @@\n"
- "+/*\n"
- "+ * arch/arm64/mach-vexpress/sleep.S\n"
- "+ *\n"
- "+ * Copyright (c) 2013 Marvell Semiconductor Inc.\n"
- "+ *\n"
- "+ * Author: Leo Yan <leoy@marvell.com>\n"
- "+ *\n"
- "+ * This program is free software; you can redistribute it and/or modify\n"
- "+ * it under the terms of the GNU General Public License as published by\n"
- "+ * the Free Software Foundation; either version 2 of the License, or\n"
- "+ * (at your option) any later version.\n"
- "+ *\n"
- "+ * This program is distributed in the hope that it will be useful, but WITHOUT\n"
- "+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\n"
- "+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\n"
- "+ * more details.\n"
- "+ *\n"
- "+ * You should have received a copy of the GNU General Public License along\n"
- "+ * with this program; if not, write to the Free Software Foundation, Inc.,\n"
- "+ * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.\n"
- "+ */\n"
- "+\n"
- "+#include <linux/linkage.h>\n"
- "+#include <linux/init.h>\n"
- "+#include <asm/assembler.h>\n"
- "+\n"
- "+/*\n"
- "+ * Exits SMP coherency.\n"
- "+ */\n"
- "+ENTRY(arm64_cpu_tear_down)\n"
- "+\tmov\tx12, lr\n"
- "+\n"
- "+\tmrs\tx0, sctlr_el1\n"
- "+\tbic\tx0, x0, #1 << 2\t\t\t// clear SCTLR.C\n"
- "+\tmsr\tsctlr_el1, x0\n"
- "+\tisb\n"
- "+\n"
- "+\tdsb\tsy\t\t\t\t// ensure ordering with previous memory accesses\n"
- "+\tmrs\tx0, clidr_el1\t\t\t// read clidr\n"
- "+\tand\tx3, x0, #0x7000000\t\t// extract loc from clidr\n"
- "+\tlsr\tx3, x3, #23\t\t\t// left align loc bit field\n"
- "+\tcbz\tx3, finished\t\t\t// if loc is 0, then no need to clean\n"
- "+\tmov\tx10, #0\t\t\t\t// start clean at cache level 0\n"
- "+\n"
- "+\tadd\tx2, x10, x10, lsr #1\t\t// work out 3x current cache level\n"
- "+\tlsr\tx1, x0, x2\t\t\t// extract cache type bits from clidr\n"
- "+\tand\tx1, x1, #7\t\t\t// mask of the bits for current cache only\n"
- "+\tcmp\tx1, #2\t\t\t\t// see what cache we have at this level\n"
- "+\tb.lt\tskip\t\t\t\t// skip if no cache, or just i-cache\n"
- "+\tsave_and_disable_irqs x9\t\t// make CSSELR and CCSIDR access atomic\n"
- "+\tmsr\tcsselr_el1, x10\t\t\t// select current cache level in csselr\n"
- "+\tisb\t\t\t\t\t// isb to sych the new cssr&csidr\n"
- "+\tmrs\tx1, ccsidr_el1\t\t\t// read the new ccsidr\n"
- "+\trestore_irqs x9\n"
- "+\tand\tx2, x1, #7\t\t\t// extract the length of the cache lines\n"
- "+\tadd\tx2, x2, #4\t\t\t// add 4 (line length offset)\n"
- "+\tmov\tx4, #0x3ff\n"
- "+\tand\tx4, x4, x1, lsr #3\t\t// find maximum number on the way size\n"
- "+\tclz\tw5, w4\t\t\t\t// find bit position of way size increment\n"
- "+\tmov\tx7, #0x7fff\n"
- "+\tand\tx7, x7, x1, lsr #13\t\t// extract max number of the index size\n"
- "+loop2:\n"
- "+\tmov\tx9, x4\t\t\t\t// create working copy of max way size\n"
- "+loop3:\n"
- "+\tlsl\tx6, x9, x5\n"
- "+\torr\tx11, x10, x6\t\t\t// factor way and cache number into x11\n"
- "+\tlsl\tx6, x7, x2\n"
- "+\torr\tx11, x11, x6\t\t\t// factor index number into x11\n"
- "+\tdc\tcisw, x11\t\t\t// clean & invalidate by set/way\n"
- "+\tsubs\tx9, x9, #1\t\t\t// decrement the way\n"
- "+\tb.ge\tloop3\n"
- "+\tsubs\tx7, x7, #1\t\t\t// decrement the index\n"
- "+\tb.ge\tloop2\n"
- "+\n"
- "+skip:\n"
- "+finished:\n"
- "+\tmov\tx10, #0\t\t\t\t// swith back to cache level 0\n"
- "+\tmsr\tcsselr_el1, x10\t\t\t// select current cache level in csselr\n"
- "+\tdsb\tsy\n"
- "+\tisb\n"
- "+\n"
- "+\tmrs\tx0, S3_1_C15_C2_1\n"
- "+\tbic\tx0, x0, #0x1 << 6\t\t// disable SMP bit\n"
- "+\tmsr\tS3_1_C15_C2_1, x0\n"
- "+\tdsb\tsy\n"
- "+\tisb\n"
- "+\n"
- "+\tret\tx12\n"
- "+ENDPROC(arm64_cpu_tear_down)\n"
- "+\n"
- "-- \n"
- 1.7.9.5
+ "Leo Yan\n"
+ "-------------- next part --------------\n"
+ "A non-text attachment was scrubbed...\n"
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+ "Type: text/x-patch\n"
+ "Size: 5866 bytes\n"
+ "Desc: not available\n"
+ "URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20130923/1711d443/attachment-0002.bin>\n"
+ "-------------- next part --------------\n"
+ "A non-text attachment was scrubbed...\n"
+ "Name: 0002-ARM64-add-cpu-tear-down-function-for-A53-s-power-mod.patch\n"
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+ "Desc: not available\n"
+ URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20130923/1711d443/attachment-0003.bin>
 
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