Re: [PATCH v5] KVM: nVMX: Fully support of nested VMX preemption timer

[Jan Kiszka <jan.kiszka@web.de>]

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On 2013-09-27 08:37, Jan Kiszka wrote:
> On 2013-09-26 22:44, Paolo Bonzini wrote:
>> Il 26/09/2013 19:47, Paolo Bonzini ha scritto:
>>>
>>> If I only apply this hunk, which disables the preemption timer while
>>> in L1:
>>>
>>> @@ -8396,6 +8375,8 @@ static void nested_vmx_vmexit(struct kvm_vcpu *vcpu)
>>>
>>>         load_vmcs12_host_state(vcpu, vmcs12);
>>>
>>> +       vmcs_write32(PIN_BASED_VM_EXEC_CONTROL, vmx_pin_based_exec_ctrl(vmx));
>>> +
>>>         /* Update TSC_OFFSET if TSC was changed while L2 ran */
>>>         vmcs_write64(TSC_OFFSET, vmx->nested.vmcs01_tsc_offset);
>>>
>>> then the testcase works for somewhat larger values of the preemption timer
>>> (up to ~1500000 TSC cycles), but then fails.
> 
> Err, does this mean we run L1 with PIN_BASED_VM_EXEC_CONTROL of L2?
> Ouch. Should be fixed independently.

No, it doesn't mean this. L1 and L2 run on different VMCS, thus should
be able to set their PIN_BASED_VM_EXEC_CONTROL independently. I have no
clue ATM what that hunk can make a difference for you. Will have a
closer look.

BTW, aren't many VMCS fields written redundantly in prepare_vmcs02? I
mean, those that weren't changed by L1 in the shadow VMCS or require
updates for other reasons. There seems to be some room for saving a few
cycles.

Jan



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