From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Hellstrom Subject: Use of pci_map_page in nouveau, radeon TTM. Date: Tue, 01 Oct 2013 12:16:16 +0200 Message-ID: <524AA0F0.6000000@vmware.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: Received: from smtp-outbound-1.vmware.com (smtp-outbound-1.vmware.com [208.91.2.12]) by gabe.freedesktop.org (Postfix) with ESMTP id 84A12E731E for ; Tue, 1 Oct 2013 03:16:20 -0700 (PDT) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org Errors-To: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org To: Jerome Glisse , Konrad Rzeszutek Wilk Cc: "dri-devel@lists.freedesktop.org" List-Id: dri-devel@lists.freedesktop.org Jerome, Konrad Forgive an ignorant question, but it appears like both Nouveau and Radeon may use pci_map_page() when populating TTMs on pages obtained using the ordinary (not DMA pool). These pages will, if I understand things correctly, not be pages allocated with DMA_ALLOC_COHERENT. From what I understand, at least for the corresponding dma_map_page() it's illegal for the CPU to access these pages without calling dma_sync_xx_for_cpu(). And before the device is allowed to access them again, you need to call dma_sync_xx_for_device(). So mapping for PCI really invalidates the TTM interleaved CPU / device access model. Or did I miss something here? Thanks, Thomas