From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54880) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VS5Co-0006ac-EK for qemu-devel@nongnu.org; Fri, 04 Oct 2013 09:14:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VS5Cg-0002KH-0A for qemu-devel@nongnu.org; Fri, 04 Oct 2013 09:14:06 -0400 Message-ID: <524EBEFB.3070909@gmail.com> Date: Fri, 04 Oct 2013 08:13:31 -0500 From: Tom Musta MIME-Version: 1.0 References: <524EBE04.8050207@gmail.com> In-Reply-To: <524EBE04.8050207@gmail.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH 02/13] Add lxsdx List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-ppc@nongnu.org Cc: Tom Musta , qemu-devel@nongnu.org This patch adds the Load VSX Scalar Doubleowrd Indexed (lxsdx) instruction. The lower 8 bytes of the target register are undefined; this implementation leaves those bytes unaltered. Signed-off-by: Tom Musta --- target-ppc/translate.c | 16 ++++++++++++++++ 1 files changed, 16 insertions(+), 0 deletions(-) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 1348360..4f2d647 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -7007,6 +7007,21 @@ static inline TCGv_i64 cpu_vsrl(int n) } } +static void gen_lxsdx(DisasContext *ctx) +{ + TCGv EA; + if (unlikely(!ctx->vsx_enabled)) { + gen_exception(ctx, POWERPC_EXCP_VSXU); + return; + } + gen_set_access_type(ctx, ACCESS_INT); + EA = tcg_temp_new(); + gen_addr_reg_index(ctx, EA); + gen_qemu_ld64(ctx, cpu_vsrh(xT(ctx->opcode)), EA); + /* NOTE: cpu_vsrl is undefined */ + tcg_temp_free(EA); +} + static void gen_lxvd2x(DisasContext *ctx) { TCGv EA; @@ -9507,6 +9522,7 @@ GEN_VAFORM_PAIRED(vmsumshm, vmsumshs, 20), GEN_VAFORM_PAIRED(vsel, vperm, 21), GEN_VAFORM_PAIRED(vmaddfp, vnmsubfp, 23), +GEN_HANDLER_E(lxsdx, 0x1F, 0x0C, 0x12, 0, PPC_NONE, PPC2_VSX), GEN_HANDLER_E(lxvd2x, 0x1F, 0x0C, 0x1A, 0, PPC_NONE, PPC2_VSX), GEN_HANDLER_E(stxvd2x, 0x1F, 0xC, 0x1E, 0, PPC_NONE, PPC2_VSX), -- 1.7.1