diff for duplicates of <525BB90B.9060105@samsung.com> diff --git a/a/1.txt b/N1/1.txt index ee3cd4a..e5458c8 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -51,7 +51,7 @@ Maybe fixed the Synopsys instead of Synopsis. > + The MSHC controller node can be split into two portions, SoC specific and > + board specific portions as listed below. > + -> + dwmmc_0: dwmmc0@fcd03000 { +> + dwmmc_0: dwmmc0 at fcd03000 { > + compatible = "hisilicon,hi4511-dw-mshc"; > + reg = <0xfcd03000 0x1000>; > + interrupts = <0 16 4>; @@ -64,7 +64,7 @@ Maybe fixed the Synopsys instead of Synopsis. > + sam-sel-reg = <0x1f8 8>; > + div-reg = <0x1f8 1>; > + }; -> + dwmmc0@fcd03000 { +> + dwmmc0 at fcd03000 { > + num-slots = <1>; > + vmmc-supply = <&ldo12>; > + fifo-depth = <0x100>; @@ -72,7 +72,7 @@ Maybe fixed the Synopsys instead of Synopsis. > + pinctrl-names = "default"; > + pinctrl-0 = <&sd_pmx_pins &sd_cfg_func1 &sd_cfg_func2>; > + cd-gpio = <&gpio10 3 0>; -> + slot@0 { +> + slot at 0 { > + reg = <0>; > + bus-width = <4>; > + }; @@ -86,7 +86,7 @@ Maybe fixed the Synopsys instead of Synopsis. > + > +Example: > + -> + pctrl: pctrl@fca09000 { +> + pctrl: pctrl at fca09000 { > + compatible = "hisilicon,pctrl"; > + reg = <0xfca09000 0x1000>; > + }; diff --git a/a/content_digest b/N1/content_digest index 99f01f3..f7921bf 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,15 +1,9 @@ "ref\01381415813-9395-1-git-send-email-zhangfei.gao@linaro.org\0" "ref\01381415813-9395-3-git-send-email-zhangfei.gao@linaro.org\0" - "From\0Jaehoon Chung <jh80.chung@samsung.com>\0" - "Subject\0Re: [PATCH 2/2] mmc: add dw-mmc-k3\0" + "From\0jh80.chung@samsung.com (Jaehoon Chung)\0" + "Subject\0[PATCH 2/2] mmc: add dw-mmc-k3\0" "Date\0Mon, 14 Oct 2013 18:27:39 +0900\0" - "To\0Zhangfei Gao <zhangfei.gao@linaro.org>" - Chris Ball <cjb@laptop.org> - Jaehoon Chung <jh80.chung@samsung.com> - " Ulf Hansson <ulf.hansson@linaro.org>\0" - "Cc\0linux-mmc@vger.kernel.org" - linux-arm-kernel@lists.infradead.org - " devicetree-discuss@lists.ozlabs.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Hi,\n" @@ -65,7 +59,7 @@ "> + The MSHC controller node can be split into two portions, SoC specific and\n" "> + board specific portions as listed below.\n" "> +\n" - "> +\tdwmmc_0: dwmmc0@fcd03000 {\n" + "> +\tdwmmc_0: dwmmc0 at fcd03000 {\n" "> +\t\tcompatible = \"hisilicon,hi4511-dw-mshc\";\n" "> +\t\treg = <0xfcd03000 0x1000>;\n" "> +\t\tinterrupts = <0 16 4>;\n" @@ -78,7 +72,7 @@ "> +\t\tsam-sel-reg = <0x1f8 8>;\n" "> +\t\tdiv-reg = <0x1f8 1>;\n" "> +\t};\n" - "> +\tdwmmc0@fcd03000 {\n" + "> +\tdwmmc0 at fcd03000 {\n" "> +\t\tnum-slots = <1>;\n" "> +\t\tvmmc-supply = <&ldo12>;\n" "> +\t\tfifo-depth = <0x100>;\n" @@ -86,7 +80,7 @@ "> +\t\tpinctrl-names = \"default\";\n" "> +\t\tpinctrl-0 = <&sd_pmx_pins &sd_cfg_func1 &sd_cfg_func2>;\n" "> +\t\tcd-gpio = <&gpio10 3 0>;\n" - "> +\t\tslot@0 {\n" + "> +\t\tslot at 0 {\n" "> +\t\t\treg = <0>;\n" "> +\t\t\tbus-width = <4>;\n" "> +\t\t};\n" @@ -100,7 +94,7 @@ "> +\n" "> +Example:\n" "> +\n" - "> +\tpctrl: pctrl@fca09000 {\n" + "> +\tpctrl: pctrl at fca09000 {\n" "> +\t\tcompatible = \"hisilicon,pctrl\";\n" "> +\t\treg = <0xfca09000 0x1000>;\n" "> +\t};\n" @@ -558,4 +552,4 @@ "> +MODULE_LICENSE(\"GPL v2\");\n" > -d23046e088e2011bcc83015cdb86efaa02e77db7c812b4eb3e14a4296d15f92f +4e4b5b118649312f714e0a16857389d08178e5ab2618da40bd3ee4a8e91957c7
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